摘要
从BiCMOS工艺着手,结合一个基本的基准电路,从实施命令文件编写的角度,重点论述了模拟集成电路的版图与原理图匹配验证中的一个重要环节,即器件的正确识别与图层间节点信息的传输。就其中易出现的一些问题,逐一提出了具体的解决方案,同时借助专业验证平台演示了如何运用图层间的逻辑运算,将其中一些处理技巧转化为可以被验证程序执行的语言,以达到快速、准确验证的目的。验证的实际结果证明这些解决方案是可行并有效的。
With a basic reference circuit as an example, key point of layout versus schematic （LVS）
verification based on a BiCMOS process was discussed, which was device recognition and nodal information transfer between layers. Then the detailed solutions to some key issues in compiling the command file of LVS were provided, which were proved to be feasible and effective by the running results with the aid of professional verification platform. Relating skills of logic operation between the drawing layers to handle those problems were also illustrated.
出处
《半导体技术》
CAS
CSCD
北大核心
2007年第7期593-597,共5页
Semiconductor Technology
