摘要
根据深亚微米SOC设计的特点和需求,提出了一种新的基于模块的全芯片分层设计方法,它把系统架构、逻辑设计以及物理实现有机结合到一起。通过渐进式时序收敛完成芯片的层次规划,并最终达到一次实现芯片级的时序收敛,大大提高了深亚微米SOC设计的效率,并在实际设计之中得到了有效验证。
After analyzing characteristic and design requirement deep submicron SOC, a new complete, full-chip, hierarchical design solution was proposed. System architecture, logical design and physical implementation were integrated perfectly. Progressive timing refinement was used to drive hierarchical planning for SOC. Finally the full-chip timing closure was met one pass. And the design efficiency for deep sub micro SOC would be improved greatly. And the solution was successfully applied to SOC design in practice.
出处
《半导体技术》
CAS
CSCD
北大核心
2007年第4期335-338,共4页
Semiconductor Technology
关键词
深亚微米
片上系统
分层
渐进收敛
deep submicron
SOC
hierarchical
progressive refinement
