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一种基于射频电子标签的超低电压低功耗基带处理器 被引量:13

An Ultralow-Voltage,Low-Power Baseband Processor for UHF RFID Tags
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摘要 设计了一款应用于超高频段射频识别系统中电子标签的超低电压低功耗基带处理器.该基带处理器兼容《EPCTMClass-1Generation-2UHFRFID》协议,并满足无源标签的超低功耗要求.在设计上有针对性地提出了一种适合于门控时钟电源管理机制的体系结构,以及简单有效的随机数发生机制和分布式译码电路;并灵活运用了流水线结构、降低逻辑深度等低功耗技术.实现了解码/编码、CRC校验、指令解析、防碰撞机制和权限认证,以及对EEPROM的读写操作等功能.芯片采用Chartered0·35μm1P3MCMOS标准工艺实现,正常工作的最低电压仅为1·5V,平均电流2·1μA,功耗3·15μW,面积1·1mm×0·8mm. A novel ultralow-voltage,low-power baseband processor for UHF RFID tags is presented. It is compatible with the "EPCTM Class-1 Generation-2 UHF RFID Protocol" and meets the special requirement of power consumption for passive tags. A new architecture of low-power baseband-processors fit for a power management scheme with a gated clock is proposed. It not only uses a novel scheme for generating pseudo-random numbers and a new partial decoder circuit, but also adopts other low-power technologies,such as a pipeline structure and reduced logic depth. The baseband processor can implement complex functions, including encoding/coding,anti-collision schemes, authorization schemes, and reading/writing operations to EEPROM. The chip is designed and fabricated using a 0.35μm 1P3M CMOS standard process. The minimum operation voltage is 1.5V,average current is 2. 1μA,and power consumption is 3. 15μW,with a die area of 1. 1mm × 0. 8mm.
出处 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2006年第10期1866-1871,共6页 半导体学报(英文版)
基金 国家高技术研究发展计划资助项目(批准号:2003AA1Z1280)~~
关键词 射频识别 电子标签 基带处理器 低功耗 瞬时功耗 RFID tag low-power baseband processor instantaneous power
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参考文献15

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二级参考文献6

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