摘要
提出了基于CPLD(复杂可编程逻辑器件)实现TDI/CCD(时间延时积分、电荷耦合器件)驱动电路的方法。选用Altera公司的MAX7000AE系列CPLD作为硬件设计平台,运用VHDL语言对驱动时序进行硬件描述,采用QuartusII对所设计的驱动时序发生器进行了仿真。测量与仿真结果证明是可行的。
The design of the driving generator for TDI/CCD was introduced based on complex programmable logic device （CPLD） . The CPLD was used as hardware design platform and VHDL was employed to describe the driving sequencer. The designed generator has been successfully fulfilled system simulation with QuartusⅡ software and fitted into MAX7000AE （a kind of CPLD products that made by Altera） . The simulation and the result s of measurement demonstrate that this method is feasible .
出处
《微计算机信息》
北大核心
2006年第06Z期227-229,共3页
Control & Automation
基金
国家自然科学基金资助项目编号:60572026
