摘要
介绍了基于替换的组合电路的等价性检验算法,利用待检验的两个电路的结构相似性来逐步约简电路,从而加速了验证过程。
A substitution-based equivalence checking for the combinational ciucuits is introduced. It uses the structural similarity of the two circuits under verification （CUVs）. During the incremental verification the circuits is simplified step by step and the process of the verification is speeded-up.
出处
《成都信息工程学院学报》
2006年第2期169-173,共5页
Journal of Chengdu University of Information Technology
关键词
等价性检验
增量算法
积自动机
割集
基于替换的算法
信号对
equivalence checking
incremental algorithm
miter
cutest
substitution-based algorithm
signal pair
