摘要
针对OFDM系统中FFT处理器的设计要求,选择并具体分析FFT基4-DIF算法流程,并利用现场可编程设计开发了高速FFT信号处理器。本设计采用Verilog HDL语言进行描述,并通过了仿真和验证。
To meet the requirements of high speed FFT processors for OFDM systems, an efficient architecture of FFT is proposed. It is based on the dedicated option and analysis of the radix - 4 DIF algorithm and implemented with FPGA. This design is described in Verilog HDL language and is proved to be successful by the simulation and verification process.
出处
《信息技术》
2005年第12期70-73,共4页
Information Technology
