摘要
通过对2-5混值编码原理、电路三要素理论和N+1值代数理论的分析,定量研究了2-5混值门电路、触发器和带进位/借位的加减法计数器,最后设计了2-5混值/十值译码电路,使计数器输出为十值信号。与以往十值电路的设计方法相比较,此设计方案具有编码效率高、供电电压低等特点。计算机模拟验证了上述理论和依此理论设计的电路的正确性。
By analyzing the principle of 2-5 mixed-valued coding, the theory of three essential circuit elements and the theory of N＋l-valued algebra, the 2-5 mixed-valued gate circuits, flip-flops and up-down counters with carry/borrow bit are investigated quantitatively, the 2-5 mixed-valued/ten-valued encoder is designed in order to make the output of counter become ten-valued signal. Compared with the conventional design of ten-valued circuits, the design has the characteristics of high coding efficiency, low voltage supply, etc. Above theory and circuits based on this theory are verified by computer simulations.
出处
《电子与信息学报》
EI
CSCD
北大核心
2005年第11期1834-1838,共5页
Journal of Electronics & Information Technology
基金
国家自然科学基金(60273093)浙江省自然科学基金(Y104135)宁波大学学科项目(XK200437)资助课题
关键词
电路设计
2-5混值编码
三要素理论
2-5混值计数器
Circuit design, 2-5 mixed-valued coding, Theory of three essential elements, 2-5 mixed-valued counter
