摘要
提出一种基于模拟仿真和覆盖率分析的方法.通过前期使用带约束的随机测试向量进行模拟仿真、在达到一定覆盖率后进行覆盖率分析、然后手工生成测试向量提高覆盖率的方法,对一款SoC芯片的总线系统进行验证,有效地减少了验证仿真所需时间,得到了预期的验证结果.
We propose a simulation-based method in the verification of SoC bus constrained-random vector is used to make simulation first; then a coverage system. By the method, analysis is made in the simulation process until a certain coverage statistics is obtained. Finally, the test vector is manually generated. We use this method to verify a SoC system and get a satisfactory result by reducing the time of simulation effectively.
出处
《计算机辅助设计与图形学学报》
EI
CSCD
北大核心
2005年第10期2220-2226,共7页
Journal of Computer-Aided Design & Computer Graphics
基金
国家自然科学基金(90207002
60242001)
关键词
片上系统
总线系统验证
覆盖率分析
system on a chip
bus system verification
coverage-analysis
