摘要
定时器是雷达系统的重要部分,它为雷达全机提供所需的各种主脉冲定时信号和波门定时信号。介绍了FPGA(现场可编程门阵列)在定时器中的应用,着重叙述了定时器原理。该定时器的特点是采用大容量FPGA,尽可能在FPGA内部实现所有功能,减少外围器件,以达到统一板级设计、提高定时精度及可靠性、降低成本、实现硬件的灵活配置的目的。
Timer is an important part of Radar system,it affords system all the AP timing signals and wave gate timing signals. Along with the continuous development of modern Radar technologies, it is more impending to achieve miniaturization, modularization, universalization, programmable, adaptable in Timer, and the application of LSI FPGA meets the require in these aspect.This article introduces the application of FPGA in timer, characteristic of FPGA and design methods of FPGA,it also discusses timer＇s elements.
出处
《电子工程师》
2005年第8期7-9,共3页
Electronic Engineer
