期刊文献+

延迟环A/D及其在DC/DC控制芯片中的应用 被引量:4

Delay-ring A/D and Its Application in DC/DC Control Chip
原文传递
导出
摘要 提出了一种无需外部时钟、可以部分抵消工艺偏差、基于标准单元的延迟环A/D变换器.该A/D变换器结构简单、无需增加产生控制信号的电路,转换速度快,可在DC/DC变换器的高频数字控制芯片中使用. A non-clock delay-ring A/D converter is presented,which is based on standard cell library and not sensitive to process variation.The architecture of this A/D converter is simple,and its speed is high. Meanwhile there is no need of any control signal.This A/D converter can be used in high-frequency digital control chip of DC/DC converter.
作者 胡骏 李文宏
出处 《复旦学报(自然科学版)》 CAS CSCD 北大核心 2005年第1期135-138,172,共5页 Journal of Fudan University:Natural Science
关键词 A/D变换器 DC/DC控制芯片 标准单元 延迟 转换速度 DC/DC变换器 抵消 时钟 控制信号 数字控制 semiconductor technology DC/DC PWM PID control delay-ring A/D
  • 相关文献

参考文献6

  • 1Lee C F, Mok P K T. A monolithic current-mode CMOS DC-DC converter with on-chip current-sensing technique [J].IEEE JSSC,2004,39(1):3-14. 被引量:1
  • 2Patella B J,Prodic A, Art Z, et al. High-frequency digital controller IC for DC/DC converters [EB/OL].IEEE Applied Power Electronics Conference.http:∥ece-www.colorado.edu/~pwrelect/publications.html,2003-01-01/2004-05-01. 被引量:1
  • 3Angel V P,Xiao J W, Sanders S R. Architecture and IC implementation of a digital VRM controller [J].IEEE Transactions on Power Electronics,2003,18(1):54-58. 被引量:1
  • 4Agrawal J P. Power electronic systems-theory and design [M].北京:清华大学出版社,2001. 被引量:1
  • 5Prodic' A, Dragan M.Mixed-signal simulation of digitally controlled switching converters [J].IEEE COMPEL,2002,6(1):34-36. 被引量:1
  • 6Allen P E, Holberg D R. CMOS Analog Circuit Design,2ndEd [M].北京:电子工业出版社,2002. 被引量:1

同被引文献20

  • 1李文石,唐璞山,许杞安,章焱.集成电路时间延迟优化分析与模拟[J].微电子学,2004,34(6):655-657. 被引量:4
  • 2吉利久.深亚微米CMOS的功耗分析[J].中国集成电路,2004,13(12):29-37. 被引量:2
  • 3程坤,秦明,张中平,黄庆安.CMOS Schmitt触发器的设计与模拟[J].电子器件,2005,28(3):505-508. 被引量:2
  • 4李文石,唐晨.基于数字电路设计直接比较型准四位ADC的仿真研究[J].中国集成电路,2006,15(7):34-37. 被引量:1
  • 5B J Prodic,A Zirger,A Maksimovic.High-frequency Digital PWM Controller IC for DC/DC Converters[J].IEEE Trans.on Power Electronics,2003,18(1):438-446. 被引量:1
  • 6Barai M,Sengupta S,Biswas J.Optimized Design of a Delay Line Based Analog to Digital Converter for Digital Power Management Applications[A].Power Electronics and Motion Control Conf.[C].2008:674-681. 被引量:1
  • 7Jinwen Xiao,Angel V Peterchev,Jianhui Zhang,et al.A 4 μA Quiescent Current Dual Mode Digitally Controlled Buck Converter IC for Cellular Phone Applications[J].IEEE Journal of Solid State Circuits,2004,39 (12):2342-2348. 被引量:1
  • 8A V Pelerchev,J Xiao,S R Sanders.Architecture and IC Implementation of a Digital VRM Controller[J].IEEE Trans.on Power Electronics,2003,18(1):301-308. 被引量:1
  • 9Chui M Y K,Ki W H,Tsui C Y.A programmable integrated digital controller for switching converters with dual-band switching and complex pole-zero compensation.IEEE J Solid-State Circuits,2005,40(3):772 被引量:1
  • 10Peterchev A V,Xiao J,Sanders S R.Architecture and IC implementation of a digital VRM controller.IEEE Trans Power Electron,2003,18(1):356 被引量:1

引证文献4

二级引证文献7

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部