摘要
本文分析了H.264 软件编码器的结构,提出了影响速度的瓶颈,并给出其中两方面的优化方案: 改进的块匹配算法和1 / 4 象素参考帧插值函数结构的优化。同时,针对高性能D S P 芯片 TMS320C64xx的特点提出了一系列的优化方案,最后讨论了C 语言程序在DSP 硬件上优化设计的 一般性规则。
In this paper, the architecture of H.264 software encoder is analyzed, and the bottleneck of speed is pointed out. Two optimization schemes
are given. They are modified block matching algorithm and optimization on quarter pixel interpolation routine. In addition, a series of
optimizing schemes aimed at high performance DSP TMS320C64xx are presented. Finally, some general rules of optimize design on DSP
using C language are given.
出处
《电子设计应用》
2005年第3期96-98,共3页
Electronic Design & Application World
