摘要
译码器可以用来实现组合电路,也可以用来实现码制转换。本文系统说明了译码的原理及应用方法。用VerilogHDL来设计一个带使能端的3线-8线译码器,并用3线-8线译码器来实现5421译码器。
The decoder can implement combinational electric circuit and be used in conjunction with other code converters as well. This paper systematically discusses the principle and application of the decoder, the design of a 3-to 8-line Decoder with enable inputs by using the Verilog Hardware Description Language and the design of a 5421 Decoder with the 3-to-8-1ine Decoder.
出处
《长沙民政职业技术学院学报》
2004年第3期66-68,共3页
Journal of Changsha Social Work College
