摘要
特定工艺条件下的器件失配程度限制了射频 /模拟集成电路的设计精度和成品率。电路设计者需要精确的MOSFET失配模型来约束电路优化设计 ,版图设计者需要相应的设计规则来减小芯片失配。本文介绍了 MOSFET失配的基本概念 ;回顾了 MOSFET模型的研究进展及相关的版图设计技术、计算机仿真方法 ;总结了 MOSFET失配对电路性能的影响及消除技术。最后探讨了
Device mismatch under a given technology limits RF/analog integrated circuits' design precision and product yield. Circuit designers require accurate MOSFET mismatch models to constrain design optimization, and layout designers need design rules to reduce die's mismatch. This paper introduced basic concepts of MOSFET mismatch, reviewed research progress of MOSFET model, layout design technology and computer simulation methodology respectively. The influence of MOSFET mismatch on circuit performance and correlative cancellation technology are summarized. Finally, the study trend of MOSFET mismatch is discussed.
出处
《电子器件》
CAS
2004年第4期767-771,共5页
Chinese Journal of Electron Devices
