摘要
人们提出了软件硬件协同设计的设计方法 ,以克服传统的将软件和硬件分开的设计方法对于SoC的设计存在的缺陷。SystemC是顺应这种发展趋势而产生的系统级描述语言。它是一种通过类对象扩展和基于C/C 的建模平台 ,支持系统级软硬件协同设计、仿真、验证、软硬件协同设计的系统级描述语言。本文介绍了系统级描述语言SystemC在集成电路设计中的应用 ,讨论了基于SystemC的集成电路设计的设计流程、设计优势及其发展趋势。
Because of traditional methodology's disadvantages for SoC design,a system level software/hardware co-design methodology has been introduced.As a new language of system level software/hardware co-design,SystemC is a kind of modeling platform based on C/C++,which supports the system level software/hardware co-design,co-simulation and verification.In this paper,system-level design language SystemC is introduced and the design flow,methodology advantages and development trend of SystemC are discussed.
出处
《计算机与数字工程》
2004年第3期30-32,共3页
Computer & Digital Engineering
