摘要
为实现运动图像的实时压解传输,在优化3D-DCT算法的基础上,采用8×8bit乘加并行、系数转换、矩阵转置、数据装载和截位的解决方式,构造了一个64位并行的三维DCT硬件核,使得运动图像的压解运算中DCT运算的CPU耗时下降了十几倍,实现了实时压缩。
For the real-time compressing and transmission of motion image,by optimizing three-dimension DCT arithmatic and using a surveying way of multiply-add paralleling,parameter conversion,data loading and cliping, a 64 bit parallel three-dimension DCT core is constructed.As a result,the CPU time descends about a dozen times。The real-time compressing and decompressing can be achieved completely.
出处
《通信技术》
2003年第2期1-3,共3页
Communications Technology
基金
国家863项目资助(863-317-03-01-05-20)
关键词
三维离散余弦变换
实时压缩
64位并行乘加器
三维转置存储体
three-dimension DCT, real-time compressing, 64 bit parallel multiply-adder, three-dimension rotation RAM
