摘要
在超大规模集成电路(VLSI)设计流程中,设计规则检查(DRC)是关键一环。多年来,设计人员为DRC设计了许多硬件加速的方法,但是都局限于成本等诸多原因而不能得到推广。因此提出了基于GPU平台的DRC方法,大幅提高了DRC效率。
In VLSI design flow, design rule checking (DRC) is an important step. In the past, designers have proposed many methods which are based on hardware. However they are often limited by the cost or some other reasons. Because of DRC building on GPU, the high performance floating-point Single Instruction Multiple Data(SIMD), the Vector Arithmetic we proposed and a/so the parallel of GPU and CPU, the efficiency is markedly improved.
出处
《微电子学与计算机》
CSCD
北大核心
2007年第4期171-173,共3页
Microelectronics & Computer