An ultra-low power complementary metal-oxide-semiconductor （CMOS） front-end readout ASIC was developed for a portable digital radiation detector. The ASIC having a charge sensitive amplifier and a semi-Gaussian puls...An ultra-low power complementary metal-oxide-semiconductor （CMOS） front-end readout ASIC was developed for a portable digital radiation detector. The ASIC having a charge sensitive amplifier and a semi-Gaussian pulse-shaper was produced using the CSMC 0.5 μm DPDM process. The ENC noise of 363 e at 0 pF with a noise slope of 23 e/pF complies with the stringent low noise requirements. The peaking time was 250 ns at a 100 mV/fC conversion gain （detector capacitance is 20 pF）. By operating this frontend readout ASIC in the weak inversion region, the ultra-low power dissipation is only 0.1 mW/channel （3.0 V） Simulations and test results suggest that this design gives lower power consumption than the front-end readout ASICs working in the strong inversion and is appropriate for the portable digital radiation detectors.展开更多
A CMOS voltage reference, which is based on VGs and/x ΔGS in the weak inversion region, has been designed and implemented in standard 0.6μm CMOS technology. No diodes and parasitic bipolar junction transistors （BJT...A CMOS voltage reference, which is based on VGs and/x ΔGS in the weak inversion region, has been designed and implemented in standard 0.6μm CMOS technology. No diodes and parasitic bipolar junction transistors （BJTs） are used. The proposed voltage reference uses a current-mode topology by summing a PTAT current and a CTAT current into a re- sistor to generate the required reference voltage. It can also provide more than one reference voltage output, which is quite suitable for systems requiring many different reference voltages simultaneously. The occupied chip area is 0. 023mm^-2 . The operation supply voltage is from 2.5 to 6V, and the maximum supply current is 8.25μA. The designed three different out- puts are respectively about 203mV, 1.0V, and 2.05V at room temperature when the supply voltage is 4V. The circuit achieves a temperature coefficient of 31ppm/℃ in the temperature range of 0 to 100℃ and an average line regulation of ± 0. 203%/V. The voltage reference has been successfully applied in a white LED backlight driver chip.展开更多
设计了一种电流增益和跨导均可线性调节的电调谐电流差分跨导放大器(ECDTA)。电路改变了电流单位增益传输的固有模式,采用工作于弱反型区的MOS管跨导线性环,得到了可电调谐的电流增益;跨导放大级采用CMOS对管和浮地电源交叉耦合放大器,...设计了一种电流增益和跨导均可线性调节的电调谐电流差分跨导放大器(ECDTA)。电路改变了电流单位增益传输的固有模式,采用工作于弱反型区的MOS管跨导线性环,得到了可电调谐的电流增益;跨导放大级采用CMOS对管和浮地电源交叉耦合放大器,在传输特性的非线性误差不大于1%时,电路的差动输入电压范围可达±2.8 V。采用SMIC 60 nm CMOS工艺进行设计,在±0.9 V电源电压下仿真表明,电流传输增益可在0.105~8.98范围内线性调节,跨导值可在0.056 m S^0.204 m S范围内线性调节;电路总功耗仅为0.31 m W。展开更多
基金Supported by the National Natural Science Foundation of China(No. BK2007026)the 333 High-Level Personnel Training Project of Jiangsu Province (No. 2007124)
文摘An ultra-low power complementary metal-oxide-semiconductor （CMOS） front-end readout ASIC was developed for a portable digital radiation detector. The ASIC having a charge sensitive amplifier and a semi-Gaussian pulse-shaper was produced using the CSMC 0.5 μm DPDM process. The ENC noise of 363 e at 0 pF with a noise slope of 23 e/pF complies with the stringent low noise requirements. The peaking time was 250 ns at a 100 mV/fC conversion gain （detector capacitance is 20 pF）. By operating this frontend readout ASIC in the weak inversion region, the ultra-low power dissipation is only 0.1 mW/channel （3.0 V） Simulations and test results suggest that this design gives lower power consumption than the front-end readout ASICs working in the strong inversion and is appropriate for the portable digital radiation detectors.
文摘A CMOS voltage reference, which is based on VGs and/x ΔGS in the weak inversion region, has been designed and implemented in standard 0.6μm CMOS technology. No diodes and parasitic bipolar junction transistors （BJTs） are used. The proposed voltage reference uses a current-mode topology by summing a PTAT current and a CTAT current into a re- sistor to generate the required reference voltage. It can also provide more than one reference voltage output, which is quite suitable for systems requiring many different reference voltages simultaneously. The occupied chip area is 0. 023mm^-2 . The operation supply voltage is from 2.5 to 6V, and the maximum supply current is 8.25μA. The designed three different out- puts are respectively about 203mV, 1.0V, and 2.05V at room temperature when the supply voltage is 4V. The circuit achieves a temperature coefficient of 31ppm/℃ in the temperature range of 0 to 100℃ and an average line regulation of ± 0. 203%/V. The voltage reference has been successfully applied in a white LED backlight driver chip.
文摘设计了一种电流增益和跨导均可线性调节的电调谐电流差分跨导放大器(ECDTA)。电路改变了电流单位增益传输的固有模式,采用工作于弱反型区的MOS管跨导线性环,得到了可电调谐的电流增益;跨导放大级采用CMOS对管和浮地电源交叉耦合放大器,在传输特性的非线性误差不大于1%时,电路的差动输入电压范围可达±2.8 V。采用SMIC 60 nm CMOS工艺进行设计,在±0.9 V电源电压下仿真表明,电流传输增益可在0.105~8.98范围内线性调节,跨导值可在0.056 m S^0.204 m S范围内线性调节;电路总功耗仅为0.31 m W。
