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SRV constraint based FIB design for wideband linear array 被引量:3
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作者 Peng Chen Yihui Liang +2 位作者 Chaohuan Hou Xiaochuan Ma Dapeng Liu 《Journal of Systems Engineering and Electronics》 SCIE EI CSCD 2010年第6期941-947,共7页
Frequency-invariant beamformer (FIB) design is a key issue in wideband array signal processing. To use commonly wideband linear array with tapped delay line (TDL) structure and complex weights, the FIB design is p... Frequency-invariant beamformer (FIB) design is a key issue in wideband array signal processing. To use commonly wideband linear array with tapped delay line (TDL) structure and complex weights, the FIB design is provided according to the rule of minimizing the sidelobe level of the beampattern at the reference frequency while keeping the distortionless response constraint in the mainlobe direction at the reference frequency, the norm constraint of the weight vector and the amplitude constraint of the averaged spatial response variation (SRV). This kind of beamformer design problem can be solved with the interior-point method after being converted to the form of standard second order cone programming (SOCP). The computer simulations are presented which illustrate the effectiveness of our FIB design method for the wideband linear array with TDL structure and complex weights. 展开更多
关键词 tapped delay line tdl wideband linear array frequency invariant beamformer (FIB) spatial response variation (SRV) second order cone programming (SOCP).
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一种FPGA⁃TDC防气泡误差编码器设计
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作者 陆江镕 李文昌 +2 位作者 刘剑 张天一 王彦虎 《半导体技术》 CAS 北大核心 2024年第5期471-475,482,共6页
在设计基于现场可编程门阵列(FPGA)的时间数字转换器(TDC)时,时钟偏斜等因素产生的气泡误差会造成抽头延迟链(TDL)中的延迟单元失效,导致TDC的分辨率变差。提出了一种防气泡误差编码器,通过统计抽头延迟链中发生变化的抽头个数,该编码... 在设计基于现场可编程门阵列(FPGA)的时间数字转换器(TDC)时,时钟偏斜等因素产生的气泡误差会造成抽头延迟链(TDL)中的延迟单元失效,导致TDC的分辨率变差。提出了一种防气泡误差编码器,通过统计抽头延迟链中发生变化的抽头个数,该编码器使抽头延迟链跳变顺序按照时间顺序映射,从而消除气泡误差的影响。利用Xilinx Virtex UltraScale+FPGA对该防气泡误差编码器的有效性进行验证,使用该编码器后,基于双端采样法的抽头延迟链TDC分辨率由3.18 ps提升至1.76 ps。实验结果表明,所提出的防气泡误差编码器能够解决气泡误差导致的延迟单元失效的问题,避免分辨率的损失。 展开更多
关键词 时间数字转换器(TDC) 现场可编程门阵列(FPGA) 气泡误差 编码器 抽头延迟链(tdl)
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