Emerging byte-addressable non-volatile memory technologies, such as phase change memory （PCM） and spin- transfer torque RAM （STT-RAM）, offer both the byte-addressability of memory and the durability of storage, th...Emerging byte-addressable non-volatile memory technologies, such as phase change memory （PCM） and spin- transfer torque RAM （STT-RAM）, offer both the byte-addressability of memory and the durability of storage, thus making it feasible to build single-level store systems. To ensure the consistency of persistent data structures in the presence of power failures or system crashes, it requires flushing cache lines to persistent memory frequently, thus incurring non-trivial synchronization overhead. To mitigate this issue, we propose two techniques. First, we use non-volatile STT-RAM as scratchpad memory on chip to store recovery information, thereby eliminating synchronization cost in the logging phase due to the avoidance of off-chip logging operations. Second, we present an adaptive synchronization policy based on caching modes in terms of data access patterns, thereby eliminating unnecessary synchronization cost in the checkpoint phase. Evaluation results indicate that the two techniques improve the overall performance from 2.15x to 2.39x compared with conventional transactional persistent memory.展开更多
Objective The cardiac synchronization therapy (CRT) was proven to have good treatment for the cardiacconduction disorders patients with serious heart failure. But many disadvantages were gradually be noticed,such as d...Objective The cardiac synchronization therapy (CRT) was proven to have good treatment for the cardiacconduction disorders patients with serious heart failure. But many disadvantages were gradually be noticed,such as difficulty of sinus electrode implantation,coronary sinus injury and bleeding,still one third展开更多
基金This work was supported by the National Natural Science Foundation of China under Grant Nos. 61502321, 61472260, and 61402302, the Beijing Natural Science Foundation under Grant No. 4143060, the Overseas Visiting Scholar Program of Beijing under Grant No. 067135300100, the State Key Laboratory of Computer Architecture of China under Grant No. CARCH201503, and the Beijing Innovative Teams and Teacher Career Development Program under Grant No. IDHT20150507.
文摘Emerging byte-addressable non-volatile memory technologies, such as phase change memory （PCM） and spin- transfer torque RAM （STT-RAM）, offer both the byte-addressability of memory and the durability of storage, thus making it feasible to build single-level store systems. To ensure the consistency of persistent data structures in the presence of power failures or system crashes, it requires flushing cache lines to persistent memory frequently, thus incurring non-trivial synchronization overhead. To mitigate this issue, we propose two techniques. First, we use non-volatile STT-RAM as scratchpad memory on chip to store recovery information, thereby eliminating synchronization cost in the logging phase due to the avoidance of off-chip logging operations. Second, we present an adaptive synchronization policy based on caching modes in terms of data access patterns, thereby eliminating unnecessary synchronization cost in the checkpoint phase. Evaluation results indicate that the two techniques improve the overall performance from 2.15x to 2.39x compared with conventional transactional persistent memory.
文摘Objective The cardiac synchronization therapy (CRT) was proven to have good treatment for the cardiacconduction disorders patients with serious heart failure. But many disadvantages were gradually be noticed,such as difficulty of sinus electrode implantation,coronary sinus injury and bleeding,still one third
