New non-volatile memory (NVM)technologies are expected to replace main memory DRAM (dynamic random access memory)in the near future.NAND flash technological breakthroughs have enabled wide adoption of solid state driv...New non-volatile memory (NVM)technologies are expected to replace main memory DRAM (dynamic random access memory)in the near future.NAND flash technological breakthroughs have enabled wide adoption of solid state drives (SSDs)in storage systems.However,flash-based SSDs,by nature,cannot avoid low endurance problems because each cell only allows a limited number of erasures.This can give rise to critical SSD reliability issues.Since many SSD write operations eventually cause many SSD erase operations,reducing SSD write traffic plays a crucial role in SSD reliability. This paper proposes two NVM-based buffer cache policies which can work together in different layers to maximally reduce SSD write traffic:a main memory buffer cache design named Hierarchical Adaptive Replacement Cache (H-ARC)and an internal SSD write buffer design named Write Traffic Reduction Buffer (WRB).H-ARC considers four factors (dirty,clean, recency,and frequency)to reduce write traffic and improve cache hit ratios in the host.WRB reduces block erasures and write traffic further inside an SSD by effectively exploiting temporal and spatial localities.These two comprehensive schemes significantly reduce total SSD write traffic at each different layer (i.e.,host and SSD)by up to 3x.Consequently,they help extend SSD lifespan without system performance degradation.展开更多
The limited lifespan is the Achilles＇ heel of solid state drives （SSDs） based on NAND flash.. NAND flash has two drawbacks that degrade SSDs＇ lifespan. One is the out-of-place update. Another is the sequential wri...The limited lifespan is the Achilles＇ heel of solid state drives （SSDs） based on NAND flash.. NAND flash has two drawbacks that degrade SSDs＇ lifespan. One is the out-of-place update. Another is the sequential write constraint within a block. SSDs usually employ write buffer to extend their lifetime. However, existing write buffer schemes only pay attention to the first drawback, while neglect the second one. We propose a hetero-buffer architecture covering both aspects simultaneously. The hetero-buffer consists of two components, dynamic random access memory （DRAM） and the reorder area. DRAM endeavors to reduce write traffic as much as possible by pursuing a higher hit ratio （overcome the first drawback）. The reorder area focuses on reordering write sequence （overcome the second drawback）. Our hetero-buffer outperforms traditional write buffers because of two reasons. First, the DRAM can adopt existing superior cache replacement policy, thus achieves higher hit ratio. Second, the hetero-buffer reorders the write sequence, which has not been exploited by traditional write buffers. Besides the optimizations mentioned above, our hetero-buffer considers the work environment of write buffer, which is also neglected by traditional write buffers. By this way, the hetero-buffer is further improved. The performance is evaluated via trace-driven simulations. Experimental results show that, SSDs employing the hetero-buffer survive longer lifespan on most workloads.展开更多
Rare-earth doped crystals carry great prospect in developing ensemble-based solid state quantum memories for remote quantum communication and fast quantum processing applications. In recent years, with this system, re...Rare-earth doped crystals carry great prospect in developing ensemble-based solid state quantum memories for remote quantum communication and fast quantum processing applications. In recent years, with this system, remarkable quantum storage performances have been realized, and more exciting applications have been exploited, while the technical challenges are also significant. In this paper, we outlined the status quo in the development of rare-earth-based quantum memories from the point of view of different storage protocols, with a focus on the experimental demonstrations. We also analyzed the challenges and provided feasible solutions.展开更多
Accurate prediction of performance degradation in complex systems such as solid oxide fuel cells is crucial for expediting technological advancements.However,significant challenges still persist due to limited compreh...Accurate prediction of performance degradation in complex systems such as solid oxide fuel cells is crucial for expediting technological advancements.However,significant challenges still persist due to limited comprehension of degradation mechanisms and difficulties in acquiring in-situ features.In this study,we propose an effective approach that integrates long short-term memory(LSTM) neural network and dynamic electrochemical impedance spectroscopy(DEIS).This integrated approach enables precise prediction of future evolutions in both current-voltage and EIS features using historical testing data,without prior knowledge of degradation mechanisms.For short-term predictions spanning hundreds of hours,our approach achieves a prediction accuracy exceeding 0.99,showcasing promising prospects for diagnostic applications.Additionally,for long-term predictions spanning thousands of hours,we quantitatively determine the significance of each degradation mechanism,which is crucial for enhancing cell durability.Moreover,our proposed approach demonstrates satisfactory predictive ability in both time and frequency domains,offering the potential to reduce EIS testing time by more than half.展开更多
NoSQL系统因其高性能、高可扩展性的优势在大数据管理中得到广泛应用,而key-value(KV)模型则是NoSQL系统中使用最广泛的一种存储模型.KV型本地存储系统对于以机械磁盘为持久化存储的情形,存在许多性能优化技术,但这些优化技术面对当前...NoSQL系统因其高性能、高可扩展性的优势在大数据管理中得到广泛应用,而key-value(KV)模型则是NoSQL系统中使用最广泛的一种存储模型.KV型本地存储系统对于以机械磁盘为持久化存储的情形,存在许多性能优化技术,但这些优化技术面对当前的硬件发展新趋势,如多核处理器、大内存和低延迟闪存、非易失性内存NVM(Non-Volatile Memory)等,难以充分发挥新硬件的优势,如数据索引、并发控制、事务日志管理等技术在多核架构下存在多核扩展性问题,又如数据存储策略不适应闪存SSD(Solid State Drive)的新存储特性而产生了IO利用率低效的问题.针对多核处理器、大内存和闪存、NVM等硬件发展新趋势,文中面向当前的大数据应用背景,综述了KV型本地存储系统在索引技术、并发控制、事务日志管理和数据放置等核心模块上的最新优化技术和系统研究成果.从处理器、内存和持久化存储的角度概括了KV型本地存储系统当前存在的最优技术,总结了当前研究尚未解决的技术挑战,并对KV型本地存储系统在CPU缓存高效性、事务日志扩展性和高可用性等方面的研究进行了展望.展开更多
In this study, high performance shape memory polyurethane （SMPU）/silica nanocomposites with different silica weight fraction including SMPU bulk, 3%, 4.5%, 6%, 7.5%, 10%, were prepared by sol-gel process initiated b...In this study, high performance shape memory polyurethane （SMPU）/silica nanocomposites with different silica weight fraction including SMPU bulk, 3%, 4.5%, 6%, 7.5%, 10%, were prepared by sol-gel process initiated by the solid acid catalyst of p-toluenesulfonic acid （PTSA）. Field emission scanning electron microscopy （FE-SEM） and transmission electron microscopy （TEM） observation show that the silica nanoparticles are dispersed evenly in SMPU/silica nanocomposites. Tensile test and dynamic mechanical analysis （DMA） suggest that the mechanical properties and the glass transition temperature （Tg） of the nanocomposites were significantly influenced by silica weight fraction. Thermogravimetric analysis （TGA） was utilized to evaluate the thermal stability and determine the actual silica weight fraction. The TGA results indicate that the thermal stability can be enhanced with the hybridization of silica nanoparticles. Differential scanning calorimetry （DSC） was conducted to test the melting enthalpy （△H） and the results suggest that the AH was markedly improved for the SMPU/silica nanocomposites. Thermomechanical test was conducted to investigate the shape memory behavior and the results show that the shape fixity is improved by hybridization of silica and good shape recovery can be obtained with the increasing of cycle number for all the samples.展开更多
文摘New non-volatile memory (NVM)technologies are expected to replace main memory DRAM (dynamic random access memory)in the near future.NAND flash technological breakthroughs have enabled wide adoption of solid state drives (SSDs)in storage systems.However,flash-based SSDs,by nature,cannot avoid low endurance problems because each cell only allows a limited number of erasures.This can give rise to critical SSD reliability issues.Since many SSD write operations eventually cause many SSD erase operations,reducing SSD write traffic plays a crucial role in SSD reliability. This paper proposes two NVM-based buffer cache policies which can work together in different layers to maximally reduce SSD write traffic:a main memory buffer cache design named Hierarchical Adaptive Replacement Cache (H-ARC)and an internal SSD write buffer design named Write Traffic Reduction Buffer (WRB).H-ARC considers four factors (dirty,clean, recency,and frequency)to reduce write traffic and improve cache hit ratios in the host.WRB reduces block erasures and write traffic further inside an SSD by effectively exploiting temporal and spatial localities.These two comprehensive schemes significantly reduce total SSD write traffic at each different layer (i.e.,host and SSD)by up to 3x.Consequently,they help extend SSD lifespan without system performance degradation.
基金Supported by the National High Technology Research and Development 863 Program of China under Grant No.2013AA013201the National Natural Science Foundation of China under Grant Nos.61025009,61232003,61120106005,61170288
文摘The limited lifespan is the Achilles＇ heel of solid state drives （SSDs） based on NAND flash.. NAND flash has two drawbacks that degrade SSDs＇ lifespan. One is the out-of-place update. Another is the sequential write constraint within a block. SSDs usually employ write buffer to extend their lifetime. However, existing write buffer schemes only pay attention to the first drawback, while neglect the second one. We propose a hetero-buffer architecture covering both aspects simultaneously. The hetero-buffer consists of two components, dynamic random access memory （DRAM） and the reorder area. DRAM endeavors to reduce write traffic as much as possible by pursuing a higher hit ratio （overcome the first drawback）. The reorder area focuses on reordering write sequence （overcome the second drawback）. Our hetero-buffer outperforms traditional write buffers because of two reasons. First, the DRAM can adopt existing superior cache replacement policy, thus achieves higher hit ratio. Second, the hetero-buffer reorders the write sequence, which has not been exploited by traditional write buffers. Besides the optimizations mentioned above, our hetero-buffer considers the work environment of write buffer, which is also neglected by traditional write buffers. By this way, the hetero-buffer is further improved. The performance is evaluated via trace-driven simulations. Experimental results show that, SSDs employing the hetero-buffer survive longer lifespan on most workloads.
基金This work was supported by the National Natural Science Foundation of China(Grant Nos.11904159 and 12004168)Guangdong Basic and Applied Basic Research Foundation(Grant No.2021A1515110191)+2 种基金Guangdong Innovative and Entrepreneurial Research Team Program(Grant No.2019ZT08X324)the Guangdong Provincial Key Laboratory(Grant No.2019B121203002)the Key-Area Research and Development Program of Guangdong Province(Grant No.2018B030326001).
文摘Rare-earth doped crystals carry great prospect in developing ensemble-based solid state quantum memories for remote quantum communication and fast quantum processing applications. In recent years, with this system, remarkable quantum storage performances have been realized, and more exciting applications have been exploited, while the technical challenges are also significant. In this paper, we outlined the status quo in the development of rare-earth-based quantum memories from the point of view of different storage protocols, with a focus on the experimental demonstrations. We also analyzed the challenges and provided feasible solutions.
基金partly supported by Japan Society for the Promotion of Science (JSPS) Postdoctoral Fellowships for Research in Japan (P22370)by Key Project of Jiangsu Province (BE2022029) in China。
文摘Accurate prediction of performance degradation in complex systems such as solid oxide fuel cells is crucial for expediting technological advancements.However,significant challenges still persist due to limited comprehension of degradation mechanisms and difficulties in acquiring in-situ features.In this study,we propose an effective approach that integrates long short-term memory(LSTM) neural network and dynamic electrochemical impedance spectroscopy(DEIS).This integrated approach enables precise prediction of future evolutions in both current-voltage and EIS features using historical testing data,without prior knowledge of degradation mechanisms.For short-term predictions spanning hundreds of hours,our approach achieves a prediction accuracy exceeding 0.99,showcasing promising prospects for diagnostic applications.Additionally,for long-term predictions spanning thousands of hours,we quantitatively determine the significance of each degradation mechanism,which is crucial for enhancing cell durability.Moreover,our proposed approach demonstrates satisfactory predictive ability in both time and frequency domains,offering the potential to reduce EIS testing time by more than half.
文摘NoSQL系统因其高性能、高可扩展性的优势在大数据管理中得到广泛应用,而key-value(KV)模型则是NoSQL系统中使用最广泛的一种存储模型.KV型本地存储系统对于以机械磁盘为持久化存储的情形,存在许多性能优化技术,但这些优化技术面对当前的硬件发展新趋势,如多核处理器、大内存和低延迟闪存、非易失性内存NVM(Non-Volatile Memory)等,难以充分发挥新硬件的优势,如数据索引、并发控制、事务日志管理等技术在多核架构下存在多核扩展性问题,又如数据存储策略不适应闪存SSD(Solid State Drive)的新存储特性而产生了IO利用率低效的问题.针对多核处理器、大内存和闪存、NVM等硬件发展新趋势,文中面向当前的大数据应用背景,综述了KV型本地存储系统在索引技术、并发控制、事务日志管理和数据放置等核心模块上的最新优化技术和系统研究成果.从处理器、内存和持久化存储的角度概括了KV型本地存储系统当前存在的最优技术,总结了当前研究尚未解决的技术挑战,并对KV型本地存储系统在CPU缓存高效性、事务日志扩展性和高可用性等方面的研究进行了展望.
文摘In this study, high performance shape memory polyurethane （SMPU）/silica nanocomposites with different silica weight fraction including SMPU bulk, 3%, 4.5%, 6%, 7.5%, 10%, were prepared by sol-gel process initiated by the solid acid catalyst of p-toluenesulfonic acid （PTSA）. Field emission scanning electron microscopy （FE-SEM） and transmission electron microscopy （TEM） observation show that the silica nanoparticles are dispersed evenly in SMPU/silica nanocomposites. Tensile test and dynamic mechanical analysis （DMA） suggest that the mechanical properties and the glass transition temperature （Tg） of the nanocomposites were significantly influenced by silica weight fraction. Thermogravimetric analysis （TGA） was utilized to evaluate the thermal stability and determine the actual silica weight fraction. The TGA results indicate that the thermal stability can be enhanced with the hybridization of silica nanoparticles. Differential scanning calorimetry （DSC） was conducted to test the melting enthalpy （△H） and the results suggest that the AH was markedly improved for the SMPU/silica nanocomposites. Thermomechanical test was conducted to investigate the shape memory behavior and the results show that the shape fixity is improved by hybridization of silica and good shape recovery can be obtained with the increasing of cycle number for all the samples.
