为降嵌入式以太网成本、提高效益,采用DSP(Digital Signal Processor)芯片和网卡接口控制芯片ENC28J60设计以太网控制器。研究了采用标准SPI(Serial Peripheral Interface)串行接口的新型独立以太网控制器ENC28J60的特点,以及与外部接...为降嵌入式以太网成本、提高效益,采用DSP(Digital Signal Processor)芯片和网卡接口控制芯片ENC28J60设计以太网控制器。研究了采用标准SPI(Serial Peripheral Interface)串行接口的新型独立以太网控制器ENC28J60的特点,以及与外部接口的硬件电路设计,分析了嵌入式TCP/IP协议的选取原则,DSP芯片对网卡接口控制芯片的控制过程和TCP/IP协议处理数据包的流程。该系统可以将数据按网络协议处理,实现数据的以太网传输。展开更多
The current massive use of digital communications demands a secure link by using an embedded system（ES） with data encryption at the protocol level. The serial peripheral interface（SPI） protocol is commonly used by...The current massive use of digital communications demands a secure link by using an embedded system（ES） with data encryption at the protocol level. The serial peripheral interface（SPI） protocol is commonly used by manufacturers of ESs and integrated circuits for applications in areas such as wired and wireless communications. We present the design and experimental implementation of a chaotic encryption and decryption algorithm applied to the SPI communication protocol. The design of the chaotic encryption algorithm along with its counterpart in the decryption is based on the chaotic Hénon map and two methods for blur and permute（in combination with DNA sequences）. The SPI protocol is configured in 16 bits to synchronize a transmitter and a receiver considering a symmetric key. Results are experimentally proved using two low-cost dsPIC microcontrollers as ESs. The SPI digital-to-analog converter is used to process, acquire, and reconstruct confidential messages based on its properties for digital signal processing. Finally, security of the cryptogram is proved by a statistical test. The digital processing capacity of the algorithm is validated by dsPIC microcontrollers.展开更多
文摘为降嵌入式以太网成本、提高效益,采用DSP(Digital Signal Processor)芯片和网卡接口控制芯片ENC28J60设计以太网控制器。研究了采用标准SPI(Serial Peripheral Interface)串行接口的新型独立以太网控制器ENC28J60的特点,以及与外部接口的硬件电路设计,分析了嵌入式TCP/IP协议的选取原则,DSP芯片对网卡接口控制芯片的控制过程和TCP/IP协议处理数据包的流程。该系统可以将数据按网络协议处理,实现数据的以太网传输。
基金Project supported by the CONACYT,México(No.166654)
文摘The current massive use of digital communications demands a secure link by using an embedded system（ES） with data encryption at the protocol level. The serial peripheral interface（SPI） protocol is commonly used by manufacturers of ESs and integrated circuits for applications in areas such as wired and wireless communications. We present the design and experimental implementation of a chaotic encryption and decryption algorithm applied to the SPI communication protocol. The design of the chaotic encryption algorithm along with its counterpart in the decryption is based on the chaotic Hénon map and two methods for blur and permute（in combination with DNA sequences）. The SPI protocol is configured in 16 bits to synchronize a transmitter and a receiver considering a symmetric key. Results are experimentally proved using two low-cost dsPIC microcontrollers as ESs. The SPI digital-to-analog converter is used to process, acquire, and reconstruct confidential messages based on its properties for digital signal processing. Finally, security of the cryptogram is proved by a statistical test. The digital processing capacity of the algorithm is validated by dsPIC microcontrollers.
