A reconfigurable complex band-pass （CBP）/low-pass （LP） active-RC filter with a noise-shaping technique for wireless receivers is presented. Its bandwidth is reconfigurable among 500 kHz, 1 MHz and 4 MHz in LP mode...A reconfigurable complex band-pass （CBP）/low-pass （LP） active-RC filter with a noise-shaping technique for wireless receivers is presented. Its bandwidth is reconfigurable among 500 kHz, 1 MHz and 4 MHz in LP mode and 1 MHz, 2 MHz and 8 MHz in CBP mode with 3 MHz center frequency. The Op-Amps used in the filter are realized in cell arrays in order to obtain scalable power consumption among the different operation modes. Furthermore, the filter can be configured into the 1st order, 2nd order or 3rd order mode, thus achieving a flexible filtering property. The noise-shaping technique is introduced to suppress the flicker noise contribution. The filter has been implemented in 180 nm CMOS and consumes less than 3 mA in the 3rd 8 MHz-bandwidth CBP mode. The spot noise at 100 Hz can be reduced by 14.4 dB at most with the introduced noise-shaping technique.展开更多
A 35-130 MHz/300-360 MHz phase-locked loop frequency synthesizer for △-∑ analog-to-digital con- verter （ADC） in 65 nm CMOS is presented. The frequency synthesizer can work in low phase-noise mode （300-360 MHz） o...A 35-130 MHz/300-360 MHz phase-locked loop frequency synthesizer for △-∑ analog-to-digital con- verter （ADC） in 65 nm CMOS is presented. The frequency synthesizer can work in low phase-noise mode （300-360 MHz） or in low-power mode （35-130 MHz） to satisfy the ADC＇s requirements. To switch between these two modes, a high frequency GHz LC VCO followed by a divided-by-four frequency divider and a low frequency ring VCO followed by a divided-by-two frequency divider are integrated on-chip. The measured results show that the fre- quency synthesizer achieves a phase-noise of-132 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 1.12 ps with 1.74 mW power consumption from a 1.2 V power supply in low phase-noise mode. In low-power mode, the frequency synthesizer achieves a phase-noise of-112 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 7.23 ps with 0.92 mW power consumption from a 1.2 V power supply.展开更多
基金Project supported by the National Science and Technology Major Projects of China(No.2012ZX03004007)the National Natural Science Foundation of China(Nos.61020106006,61076029)
文摘A reconfigurable complex band-pass （CBP）/low-pass （LP） active-RC filter with a noise-shaping technique for wireless receivers is presented. Its bandwidth is reconfigurable among 500 kHz, 1 MHz and 4 MHz in LP mode and 1 MHz, 2 MHz and 8 MHz in CBP mode with 3 MHz center frequency. The Op-Amps used in the filter are realized in cell arrays in order to obtain scalable power consumption among the different operation modes. Furthermore, the filter can be configured into the 1st order, 2nd order or 3rd order mode, thus achieving a flexible filtering property. The noise-shaping technique is introduced to suppress the flicker noise contribution. The filter has been implemented in 180 nm CMOS and consumes less than 3 mA in the 3rd 8 MHz-bandwidth CBP mode. The spot noise at 100 Hz can be reduced by 14.4 dB at most with the introduced noise-shaping technique.
文摘A 35-130 MHz/300-360 MHz phase-locked loop frequency synthesizer for △-∑ analog-to-digital con- verter （ADC） in 65 nm CMOS is presented. The frequency synthesizer can work in low phase-noise mode （300-360 MHz） or in low-power mode （35-130 MHz） to satisfy the ADC＇s requirements. To switch between these two modes, a high frequency GHz LC VCO followed by a divided-by-four frequency divider and a low frequency ring VCO followed by a divided-by-two frequency divider are integrated on-chip. The measured results show that the fre- quency synthesizer achieves a phase-noise of-132 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 1.12 ps with 1.74 mW power consumption from a 1.2 V power supply in low phase-noise mode. In low-power mode, the frequency synthesizer achieves a phase-noise of-112 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 7.23 ps with 0.92 mW power consumption from a 1.2 V power supply.
