In this paper, the three-dimensional （3D） coupling effect is discussed for nanowire junctionless silicon-on-insulator （SOI） FinFETs. With fin width decreasing from 100 nm to 7 nm, the electric field induced by the...In this paper, the three-dimensional （3D） coupling effect is discussed for nanowire junctionless silicon-on-insulator （SOI） FinFETs. With fin width decreasing from 100 nm to 7 nm, the electric field induced by the lateral gates increases and therefore the influence of back gate on the threshold voltage weakens. For a narrow and tall fin, the lateral gates mainly control the channel and therefore the effect of back gate decreases. A simple two-dimensional （2D） potential model is proposed for the subthreshold region of junctionless SO1 FinFET. TCAD simulations validate our model. It can be used to extract the threshold voltage and doping concentration. In addition, the tuning of back gate on the threshold voltage can be predicted.展开更多
A novel lateral IGBT with a second gate on the emitter portion is presented.A PMOS transistor,driven by the proposed device itself,is used to short the PN junction at the emitter while turned off.Low on state voltage ...A novel lateral IGBT with a second gate on the emitter portion is presented.A PMOS transistor,driven by the proposed device itself,is used to short the PN junction at the emitter while turned off.Low on state voltage and fast turn off speed are obtained without side-effects such as snapback I-V characteristics and difficulties of process complexity.Numerical simulation results show a drop of fall time from 120 to 12 ns and no increase of on state voltage.展开更多
A lateral insulated gate bipolar transistor(LIGBT)based on silicon-on-insulator(SOI)structure is proposed and investigated.This device features a compound dielectric buried layer(CDBL)and an assistant-depletion trench...A lateral insulated gate bipolar transistor(LIGBT)based on silicon-on-insulator(SOI)structure is proposed and investigated.This device features a compound dielectric buried layer(CDBL)and an assistant-depletion trench(ADT).The CDBL is employed to introduce two high electric field peaks that optimize the electric field distributions and that,under the same breakdown voltage(BV)condition,allow the CDBL to acquire a drift region of shorter length and a smaller number of stored carriers.Reducing their numbers helps in fast-switching.Furthermore,the ADT contributes to the rapid extraction of the stored carriers from the drift region as well as the formation of an additional heat-flow channel.The simulation results show that the BV of the proposed LIGBT is increased by 113%compared with the conventional SOI LIGBT of the same length L_(D).Contrastingly,the length of the drift region of the proposed device(11.2μm)is about one third that of a traditional device(33μm)with the same BV of 141 V.Therefore,the turn-off loss(E_(OFF))of the CDBL SOI LIGBT is decreased by 88.7%compared with a conventional SOI LIGBT when the forward voltage drop(VF)is 1.64 V.Moreover,the short-circuit failure time of the proposed device is 45%longer than that of the conventional SOI LIGBT.Therefor,the proposed CDBL SOI LIGBT exhibits a better V_(F)-E_(OFF)tradeoff and an improved short-circuit robustness.展开更多
A novel shorted anode lateral-insulated gate bipolar transistor(SA LIGBT)with snapback-free characteristic is proposed and investigated.The device features a controlled barrier V_(barrier)and resistance R_(SA)in anode...A novel shorted anode lateral-insulated gate bipolar transistor(SA LIGBT)with snapback-free characteristic is proposed and investigated.The device features a controlled barrier V_(barrier)and resistance R_(SA)in anode,named CBR LIGBT.The electron barrier is formed by the P-float/N-buffer junction,while the anode resistance includes the polysilicon layer and N-float.At forward conduction stage,the V_(barrier)and R_(SA)can be increased by adjusting the doping of the P-float and polysilicon layer,respectively,which can suppress the unipolar mode to eliminate the snapback.At turn-off stage,the low-resistance extraction path(N-buffer/P-float/polysilicon layer/N-float)can quickly extract the electrons in the N-drift,which can effectively accelerate the turn-off speed of the device.The simulation results show that at the same V_(on) of 1.3 V,the E_(off)of the CBR LIGBT is reduced by 85%,73%,and 59.6%compared with the SSA LIGBT,conventional LIGBT,and TSA LIGBT,respectively.Additionally,at the same Eoffof 1.5 m J/cm^(2),the CBR LIGBT achieves the lowest V_(on) of 1.1 V compared with the other LIGBTs.展开更多
A novel lateral insulated gate bipolar transistor on a silicon-on-insulator substrate SOI-LIGBT with a special low-doped P-well structure is proposed.The P-well structure is added to attach the P-body under the channe...A novel lateral insulated gate bipolar transistor on a silicon-on-insulator substrate SOI-LIGBT with a special low-doped P-well structure is proposed.The P-well structure is added to attach the P-body under the channel so as to reduce the linear anode current degradation without additional process.The influence of the length and depth of the P-well on the hot-carrier HC reliability of the SOI-LIGBT is studied.With the increase in the length of the P-well the perpendicular electric field peak and the impact ionization peak diminish resulting in the reduction of the hot-carrier degradation. In addition the impact ionization will be weakened with the increase in the depth of the P-well which also makes the hot-carrier degradation decrease.Considering the effect of the low-doped P-well and the process windows the length and depth of the P-well are both chosen as 2 μm.展开更多
A low gate voltage operated multi-emitter-dot gated lateral bipolar junction transistor （BJT） ion sensor is proposed. The proposed device is composed of an arrayed gated lateral BJT, which is driven in the metal-oxi...A low gate voltage operated multi-emitter-dot gated lateral bipolar junction transistor （BJT） ion sensor is proposed. The proposed device is composed of an arrayed gated lateral BJT, which is driven in the metal-oxidesemiconductor field-effect transistor （MOSFET）-BJT hybrid operation mode. Further, it has multiple emitter dots linked to each other in parallel to improve ionic sensitivity. Using hydrogen ionic solutions as reference solutions, we conduct experiments in which we compare the sensitivity and threshold voltage of the multi-emitter-dot gated lateral BJT with that of the single-emitter-dot gated lateral BJT. The multi-emitter-dot gated lateral BJT not only shows increased sensitivity but, more importantly, the proposed device can be operated under very low gate voltage, whereas the conventional ion-sensitive field-effect transistors cannot. This special characteristic is significant for low power devices and for function devices in which the provision of a gate voltage is difficult.展开更多
A novel ultralow turnoff loss dual-gate silicon-on-insulator （SOI） lateral insulated gate bipolar transistor （LIGBT） is proposed. The proposed SOI LIGBT features an extra trench gate inserted between the p-well an...A novel ultralow turnoff loss dual-gate silicon-on-insulator （SOI） lateral insulated gate bipolar transistor （LIGBT） is proposed. The proposed SOI LIGBT features an extra trench gate inserted between the p-well and n-drift, and an n-type carrier stored （CS） layer beneath the p-well. In the on-state, the extra trench gate acts as a barrier, which increases the cartier density at the cathode side of n-drift region, resulting in a decrease of the on-state voltage drop （Von）. In the off-state, due to the uniform carder distribution and the assisted depletion effect induced by the extra trench gate, large number of carriers can be removed at the initial turnoff process, contributing to a low turnoff loss （Eoff）. Moreover, owing to the dual-gate field plates and CS layer, the carrier density beneath the p-well can greatly increase, which further improves the tradeoff between Eoff and Von. Simulation results show that Eoff of the proposed SOI LIGBT can decrease by 77% compared with the conventional trench gate SOI LIGBT at the same Von of 1.1 V.展开更多
In this paper, a novel dual-gate and dielectric-inserted lateral trench insulated gate bipolar transistor （DGDI LTIGBT） structure, which features a double extended trench gate and a dielectric inserted in the drift ...In this paper, a novel dual-gate and dielectric-inserted lateral trench insulated gate bipolar transistor （DGDI LTIGBT） structure, which features a double extended trench gate and a dielectric inserted in the drift region, is proposed and discussed. The device can not only decrease the specific on-resistance Ron,sp , but also simultaneously improve the temperature performance. Simulation results show that the proposed LTIGBT achieves an ultra-low on-state voltage drop of 1.31 V at 700 A·cm-2 with a small half-cell pitch of 10.5 μm, a specific on-resistance R on,sp of 187 mΩ·mm2, and a high breakdown voltage of 250 V. The on-state voltage drop of the DGDI LTIGBT is 18% less than that of the DI LTIGBT and 30.3% less than that of the conventional LTIGBT. The proposed LTIGBT exhibits a good positive temperature coefficient for safety paralleling to handling larger currents and enhances the short-circuit capability while maintaining a low self-heating effect. Furthermore, it also shows a better tradeoff between the specific on-resistance and the turnoff loss, although it has a longer turnoff delay time.展开更多
We have analyzed the operating mechanism of the novel deep submicrometer SOI drive-in gate controlled hybrid transistor (DGCHT), which can effectively alleviate the contradiction between speed enhancement and power re...We have analyzed the operating mechanism of the novel deep submicrometer SOI drive-in gate controlled hybrid transistor (DGCHT), which can effectively alleviate the contradiction between speed enhancement and power reduction in conventional MOS devices and can improve the output resistance. On the basis of this, the subthreshold current model of DGCHTs is proposed. The model takes into account the impact of lateral non-uniform doping profile on body effect, short-channel effect and carrier mobility. Considering the mobile charge, two-dimensional Poisson equation is solved with quasi-two-dimensional analysis and parabolic approximation of surface potential. With the surface potential obtained, the subthreshold current is figured out, including both the diffusion and drift component. The calculated results are in good agreement with the MEDICI numerical simulation results, indicating the correct description of the current characteristics of SOI DGCHT by the presented model. The model can also be considered as an important reference to the current simulation of deep submicrometer MOSFET with pocket implantation.展开更多
A high voltage（〉 600 V） integrable silicon-on-insulator（SOI） trench-type lateral insulated gate bipolar transistor（LIGBT） with a reduced cell-pitch is proposed.The LIGBT features multiple trenches（MTs）：two o...A high voltage（〉 600 V） integrable silicon-on-insulator（SOI） trench-type lateral insulated gate bipolar transistor（LIGBT） with a reduced cell-pitch is proposed.The LIGBT features multiple trenches（MTs）：two oxide trenches in the drift region and a trench gate extended to the buried oxide（BOX）.Firstly,the oxide trenches enhance electric field strength because of the lower permittivity of oxide than that of Si.Secondly,oxide trenches bring in multi-directional depletion,leading to a reshaped electric field distribution and an enhanced reduced-surface electric-field（RESURF） effect.Both increase the breakdown voltage（BV）.Thirdly,oxide trenches fold the drift region around the oxide trenches,leading to a reduced cell-pitch.Finally,the oxide trenches enhance the conductivity modulation,resulting in a high electron/hole concentration in the drift region as well as a low forward voltage drop（Von）.The oxide trenches cause a low anode-cathode capacitance,which increases the switching speed and reduces the turn-off energy loss（Eoff）.The MT SOI LIGBT exhibits a BV of 603 V at a small cell-pitch of 24 μm,a Von of 1.03 V at 100 A/cm-2,a turn-off time of 250 ns and Eoff of 4.1×10？3 mJ.The trench gate extended to BOX synchronously acts as dielectric isolation between high voltage LIGBT and low voltage circuits,simplifying the fabrication processes.展开更多
This paper presents a compact two-dimensional analytical device model of surface potential,in addition to electric field of triple-material double-gate(TMDG)tunnel FET.The TMDG TFET device model is developed using a p...This paper presents a compact two-dimensional analytical device model of surface potential,in addition to electric field of triple-material double-gate(TMDG)tunnel FET.The TMDG TFET device model is developed using a parabolic approximation method in the channel depletion space and a boundary state of affairs across the drain and source.The TMDG TFET device is used to analyze the electrical performance of the TMDG structure in terms of changes in potential voltage,lateral and vertical electric field.Because the TMDG TFET has a simple compact structure,the surface potential is computationally efficient and,therefore,may be utilized to analyze and characterize the gate-controlled devices.Furthermore,using Kane's model,the current across the drain can be modeled.The graph results achieved from this device model are close to the data collected from the technology computer aided design(TCAD)simulation.展开更多
A reverse-conducting lateral insulated-gate bipolar transistor （NI.2-LltJlS｜） with a trench oxide layer （IUL）, teaturlng a vertical N-buffer and P-collector is proposed. Firstly, the TOL enhances both of the surf...A reverse-conducting lateral insulated-gate bipolar transistor （NI.2-LltJlS｜） with a trench oxide layer （IUL）, teaturlng a vertical N-buffer and P-collector is proposed. Firstly, the TOL enhances both of the surface and bulk electric fields of the N-drift region, thus the breakdown voltage （BV） is improved. Secondly, the vertical N-buffer layer increases the voltage drop VpN of the P-collector/N-buffer junction, thus the snapback is suppressed. Thirdly, the P-body and the vertical N-buffer act as the anode and the cathode, respectively, to conduct the reverse current, thus the inner diode is integrated. As shown by the simulation results, the proposed RC-LIGBT exhibits trapezoidal electric field distribution with BV of 342.4 V, which is increased by nearly 340% compared to the conventional RC-LIGBT with triangular electric fields of 100.2 V. Moreover, the snapback is eliminated by the vertical N-buffer layer design, thus the reliability of the device is improved.展开更多
基于介质场增强(ENDIF)理论,提出了一种部分超结型薄硅层SOI横向绝缘栅双极型晶体管(PSJ SOI LIGBT)。分析了漂移区注入剂量和超结区域位置对器件耐压性能的影响,并在工艺流程中结合线性变掺杂技术和超结技术,使该器件实现了高垂直方向...基于介质场增强(ENDIF)理论,提出了一种部分超结型薄硅层SOI横向绝缘栅双极型晶体管(PSJ SOI LIGBT)。分析了漂移区注入剂量和超结区域位置对器件耐压性能的影响,并在工艺流程中结合线性变掺杂技术和超结技术,使该器件实现了高垂直方向耐压和低导通电阻。测试结果表明,该器件的耐压达到816 V,比导通电阻仅为12.5Ω·mm^(2)。展开更多
基金supported by the Research Program of the National University of Defense Technology(Grant No.JC 13-06-04)
文摘In this paper, the three-dimensional （3D） coupling effect is discussed for nanowire junctionless silicon-on-insulator （SOI） FinFETs. With fin width decreasing from 100 nm to 7 nm, the electric field induced by the lateral gates increases and therefore the influence of back gate on the threshold voltage weakens. For a narrow and tall fin, the lateral gates mainly control the channel and therefore the effect of back gate decreases. A simple two-dimensional （2D） potential model is proposed for the subthreshold region of junctionless SO1 FinFET. TCAD simulations validate our model. It can be used to extract the threshold voltage and doping concentration. In addition, the tuning of back gate on the threshold voltage can be predicted.
文摘A novel lateral IGBT with a second gate on the emitter portion is presented.A PMOS transistor,driven by the proposed device itself,is used to short the PN junction at the emitter while turned off.Low on state voltage and fast turn off speed are obtained without side-effects such as snapback I-V characteristics and difficulties of process complexity.Numerical simulation results show a drop of fall time from 120 to 12 ns and no increase of on state voltage.
基金Project supported by the National Basic Research Program of China(Grant No.2015CB351906)Science Foundation for Distinguished Young Scholars of Shaanxi Province,China(Grant No.2018JC-017)。
文摘A lateral insulated gate bipolar transistor(LIGBT)based on silicon-on-insulator(SOI)structure is proposed and investigated.This device features a compound dielectric buried layer(CDBL)and an assistant-depletion trench(ADT).The CDBL is employed to introduce two high electric field peaks that optimize the electric field distributions and that,under the same breakdown voltage(BV)condition,allow the CDBL to acquire a drift region of shorter length and a smaller number of stored carriers.Reducing their numbers helps in fast-switching.Furthermore,the ADT contributes to the rapid extraction of the stored carriers from the drift region as well as the formation of an additional heat-flow channel.The simulation results show that the BV of the proposed LIGBT is increased by 113%compared with the conventional SOI LIGBT of the same length L_(D).Contrastingly,the length of the drift region of the proposed device(11.2μm)is about one third that of a traditional device(33μm)with the same BV of 141 V.Therefore,the turn-off loss(E_(OFF))of the CDBL SOI LIGBT is decreased by 88.7%compared with a conventional SOI LIGBT when the forward voltage drop(VF)is 1.64 V.Moreover,the short-circuit failure time of the proposed device is 45%longer than that of the conventional SOI LIGBT.Therefor,the proposed CDBL SOI LIGBT exhibits a better V_(F)-E_(OFF)tradeoff and an improved short-circuit robustness.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61604027 and 61704016)the Fund from Chongqing Technology Innovation and Application Development(Key Industry Research and Development),China(Grant No.cstc2018jszx-cyzd0646)。
文摘A novel shorted anode lateral-insulated gate bipolar transistor(SA LIGBT)with snapback-free characteristic is proposed and investigated.The device features a controlled barrier V_(barrier)and resistance R_(SA)in anode,named CBR LIGBT.The electron barrier is formed by the P-float/N-buffer junction,while the anode resistance includes the polysilicon layer and N-float.At forward conduction stage,the V_(barrier)and R_(SA)can be increased by adjusting the doping of the P-float and polysilicon layer,respectively,which can suppress the unipolar mode to eliminate the snapback.At turn-off stage,the low-resistance extraction path(N-buffer/P-float/polysilicon layer/N-float)can quickly extract the electrons in the N-drift,which can effectively accelerate the turn-off speed of the device.The simulation results show that at the same V_(on) of 1.3 V,the E_(off)of the CBR LIGBT is reduced by 85%,73%,and 59.6%compared with the SSA LIGBT,conventional LIGBT,and TSA LIGBT,respectively.Additionally,at the same Eoffof 1.5 m J/cm^(2),the CBR LIGBT achieves the lowest V_(on) of 1.1 V compared with the other LIGBTs.
基金The National Natural Science Foundation of China(No.61204083)the Natural Science Foundation of Jiangsu Province(No.BK2011059)the Program for New Century Excellent Talents in University(No.NCET-10-0331)
文摘A novel lateral insulated gate bipolar transistor on a silicon-on-insulator substrate SOI-LIGBT with a special low-doped P-well structure is proposed.The P-well structure is added to attach the P-body under the channel so as to reduce the linear anode current degradation without additional process.The influence of the length and depth of the P-well on the hot-carrier HC reliability of the SOI-LIGBT is studied.With the increase in the length of the P-well the perpendicular electric field peak and the impact ionization peak diminish resulting in the reduction of the hot-carrier degradation. In addition the impact ionization will be weakened with the increase in the depth of the P-well which also makes the hot-carrier degradation decrease.Considering the effect of the low-doped P-well and the process windows the length and depth of the P-well are both chosen as 2 μm.
基金Supported by the National Natural Science Foundation of China under Grant No 61403014
文摘A low gate voltage operated multi-emitter-dot gated lateral bipolar junction transistor （BJT） ion sensor is proposed. The proposed device is composed of an arrayed gated lateral BJT, which is driven in the metal-oxidesemiconductor field-effect transistor （MOSFET）-BJT hybrid operation mode. Further, it has multiple emitter dots linked to each other in parallel to improve ionic sensitivity. Using hydrogen ionic solutions as reference solutions, we conduct experiments in which we compare the sensitivity and threshold voltage of the multi-emitter-dot gated lateral BJT with that of the single-emitter-dot gated lateral BJT. The multi-emitter-dot gated lateral BJT not only shows increased sensitivity but, more importantly, the proposed device can be operated under very low gate voltage, whereas the conventional ion-sensitive field-effect transistors cannot. This special characteristic is significant for low power devices and for function devices in which the provision of a gate voltage is difficult.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61376080 and 61674027)the Natural Science Foundation of Guangdong Province,China(Grant Nos.2014A030313736 and 2016A030311022)
文摘A novel ultralow turnoff loss dual-gate silicon-on-insulator （SOI） lateral insulated gate bipolar transistor （LIGBT） is proposed. The proposed SOI LIGBT features an extra trench gate inserted between the p-well and n-drift, and an n-type carrier stored （CS） layer beneath the p-well. In the on-state, the extra trench gate acts as a barrier, which increases the cartier density at the cathode side of n-drift region, resulting in a decrease of the on-state voltage drop （Von）. In the off-state, due to the uniform carder distribution and the assisted depletion effect induced by the extra trench gate, large number of carriers can be removed at the initial turnoff process, contributing to a low turnoff loss （Eoff）. Moreover, owing to the dual-gate field plates and CS layer, the carrier density beneath the p-well can greatly increase, which further improves the tradeoff between Eoff and Von. Simulation results show that Eoff of the proposed SOI LIGBT can decrease by 77% compared with the conventional trench gate SOI LIGBT at the same Von of 1.1 V.
基金the Major Program of the National Natural Science Foundation of China(Grant No.2009ZX02305-006)the National Natural Science Foundation of China(Grant No.61076082)
文摘In this paper, a novel dual-gate and dielectric-inserted lateral trench insulated gate bipolar transistor （DGDI LTIGBT） structure, which features a double extended trench gate and a dielectric inserted in the drift region, is proposed and discussed. The device can not only decrease the specific on-resistance Ron,sp , but also simultaneously improve the temperature performance. Simulation results show that the proposed LTIGBT achieves an ultra-low on-state voltage drop of 1.31 V at 700 A·cm-2 with a small half-cell pitch of 10.5 μm, a specific on-resistance R on,sp of 187 mΩ·mm2, and a high breakdown voltage of 250 V. The on-state voltage drop of the DGDI LTIGBT is 18% less than that of the DI LTIGBT and 30.3% less than that of the conventional LTIGBT. The proposed LTIGBT exhibits a good positive temperature coefficient for safety paralleling to handling larger currents and enhances the short-circuit capability while maintaining a low self-heating effect. Furthermore, it also shows a better tradeoff between the specific on-resistance and the turnoff loss, although it has a longer turnoff delay time.
文摘We have analyzed the operating mechanism of the novel deep submicrometer SOI drive-in gate controlled hybrid transistor (DGCHT), which can effectively alleviate the contradiction between speed enhancement and power reduction in conventional MOS devices and can improve the output resistance. On the basis of this, the subthreshold current model of DGCHTs is proposed. The model takes into account the impact of lateral non-uniform doping profile on body effect, short-channel effect and carrier mobility. Considering the mobile charge, two-dimensional Poisson equation is solved with quasi-two-dimensional analysis and parabolic approximation of surface potential. With the surface potential obtained, the subthreshold current is figured out, including both the diffusion and drift component. The calculated results are in good agreement with the MEDICI numerical simulation results, indicating the correct description of the current characteristics of SOI DGCHT by the presented model. The model can also be considered as an important reference to the current simulation of deep submicrometer MOSFET with pocket implantation.
基金Projects supported by the National Natural Science Foundation of China (Grant No. 61176069)the State Key Laboratory of Electronic Thin Films and Integrated Devices,China (Grant No. CXJJ201004)the National Key Laboratory of Analog Integrated Circuit,China (Grant No. 9140C090304110C0905)
文摘A high voltage（〉 600 V） integrable silicon-on-insulator（SOI） trench-type lateral insulated gate bipolar transistor（LIGBT） with a reduced cell-pitch is proposed.The LIGBT features multiple trenches（MTs）：two oxide trenches in the drift region and a trench gate extended to the buried oxide（BOX）.Firstly,the oxide trenches enhance electric field strength because of the lower permittivity of oxide than that of Si.Secondly,oxide trenches bring in multi-directional depletion,leading to a reshaped electric field distribution and an enhanced reduced-surface electric-field（RESURF） effect.Both increase the breakdown voltage（BV）.Thirdly,oxide trenches fold the drift region around the oxide trenches,leading to a reduced cell-pitch.Finally,the oxide trenches enhance the conductivity modulation,resulting in a high electron/hole concentration in the drift region as well as a low forward voltage drop（Von）.The oxide trenches cause a low anode-cathode capacitance,which increases the switching speed and reduces the turn-off energy loss（Eoff）.The MT SOI LIGBT exhibits a BV of 603 V at a small cell-pitch of 24 μm,a Von of 1.03 V at 100 A/cm-2,a turn-off time of 250 ns and Eoff of 4.1×10？3 mJ.The trench gate extended to BOX synchronously acts as dielectric isolation between high voltage LIGBT and low voltage circuits,simplifying the fabrication processes.
基金supported by Women Scientist Scheme-A, Department of Science and Technology, New Delhi, Government of India, under the Grant SR/WOS-A/ET-5/2017
文摘This paper presents a compact two-dimensional analytical device model of surface potential,in addition to electric field of triple-material double-gate(TMDG)tunnel FET.The TMDG TFET device model is developed using a parabolic approximation method in the channel depletion space and a boundary state of affairs across the drain and source.The TMDG TFET device is used to analyze the electrical performance of the TMDG structure in terms of changes in potential voltage,lateral and vertical electric field.Because the TMDG TFET has a simple compact structure,the surface potential is computationally efficient and,therefore,may be utilized to analyze and characterize the gate-controlled devices.Furthermore,using Kane's model,the current across the drain can be modeled.The graph results achieved from this device model are close to the data collected from the technology computer aided design(TCAD)simulation.
基金Project supported by the National Natural Science Foundation of China(Grant No.61604027)the Basic and Advanced Technology Research Project of Chongqing Municipality,China(Grant No.cstc2016jcyj A1923)+3 种基金the Scientific and Technological Research Foundation of Chongqing Municipal Education Commission,China(Grant No.KJ1500404)the Youth Natural Science Foundation of Chongqing University of Posts and Telecommunications,China(Grant Nos.A2015-50 and A2015-52)the Chongqing Key Laboratory Improvement Plan,China(Chongqing Key Laboratory of Photo Electronic Information Sensing and Transmitting Technology)(Grant No.cstc2014pt-sy40001)the University Innovation Team Construction Plan Funding Project of Chongqing,China(Architecture and Core Technologies of Smart Medical System)(Grant No.CXTDG201602009)
文摘A reverse-conducting lateral insulated-gate bipolar transistor （NI.2-LltJlS｜） with a trench oxide layer （IUL）, teaturlng a vertical N-buffer and P-collector is proposed. Firstly, the TOL enhances both of the surface and bulk electric fields of the N-drift region, thus the breakdown voltage （BV） is improved. Secondly, the vertical N-buffer layer increases the voltage drop VpN of the P-collector/N-buffer junction, thus the snapback is suppressed. Thirdly, the P-body and the vertical N-buffer act as the anode and the cathode, respectively, to conduct the reverse current, thus the inner diode is integrated. As shown by the simulation results, the proposed RC-LIGBT exhibits trapezoidal electric field distribution with BV of 342.4 V, which is increased by nearly 340% compared to the conventional RC-LIGBT with triangular electric fields of 100.2 V. Moreover, the snapback is eliminated by the vertical N-buffer layer design, thus the reliability of the device is improved.
文摘基于介质场增强(ENDIF)理论,提出了一种部分超结型薄硅层SOI横向绝缘栅双极型晶体管(PSJ SOI LIGBT)。分析了漂移区注入剂量和超结区域位置对器件耐压性能的影响,并在工艺流程中结合线性变掺杂技术和超结技术,使该器件实现了高垂直方向耐压和低导通电阻。测试结果表明,该器件的耐压达到816 V,比导通电阻仅为12.5Ω·mm^(2)。
