通过理论计算、仿真与实验验证的方式研制出3.3 kV/50 A 4H-碳化硅(SiC)结势垒肖特基(JBS)二极管芯片。芯片漂移区厚度33μm,掺杂浓度2×1015 cm-3,p+结区深度0.6μm,p+结区掺杂浓度5×1018 cm-3。芯片终端采用非均匀场限环结...通过理论计算、仿真与实验验证的方式研制出3.3 kV/50 A 4H-碳化硅(SiC)结势垒肖特基(JBS)二极管芯片。芯片漂移区厚度33μm,掺杂浓度2×1015 cm-3,p+结区深度0.6μm,p+结区掺杂浓度5×1018 cm-3。芯片终端采用非均匀场限环结构。芯片静态测试表明,反向电压3.3 kV时漏电流低于100μA,正向电流50 A时压降小于2.4 V,与设计目标相符。基于该SiC JBS芯片完成了3.3 kV/400 A Si IGBT/SiC JBS混合功率模块研制,测试结果表明混合功率模块降低开关损耗明显,为实现变流装置高效化、小型化及轻量化打下了基础。展开更多
This paper reports that the 4H-SiC Schottky barrier diode, PiN diode and junction barrier Schottky diode terminated by field guard rings are designed, fabricated and characterised. The measurements for forward and rev...This paper reports that the 4H-SiC Schottky barrier diode, PiN diode and junction barrier Schottky diode terminated by field guard rings are designed, fabricated and characterised. The measurements for forward and reverse characteristics have been done, and by comparison with each other, it shows that junction barrier Schottky diode has a lower reverse current density than that of the Schottky barrier diode and a higher forward drop than that of the PiN diode. High-temperature annealing is presented in this paper as well to figure out an optimised processing. The barrier height of 0.79 eV is formed with Ti in this work, the forward drop for the Schottky diode is 2.1 V, with an ideality factor of 3.2, and junction barrier Schottky diode with blocking voltage higher than 400 V was achieved by using field guard ring termination.展开更多
The current-voltage characteristics of 4H-SiC junction barrier Schottky （JBS） diodes terminated by an offset field plate have been measured in the temperature range of 25-300℃. An experimental barrier height value ...The current-voltage characteristics of 4H-SiC junction barrier Schottky （JBS） diodes terminated by an offset field plate have been measured in the temperature range of 25-300℃. An experimental barrier height value of about 0.5 eV is obtained for the Ti/4H-SiC JBS diodes at room temperature. A decrease in the experimental barrier height and an increase in the ideality factor with decreasing temperature are shown. Reverse recovery testing also shows the temperature dependence of the peak recovery current density and the reverse recovery time. Finally, a discussion of reducing the reverse recovery time is presented.展开更多
文摘通过理论计算、仿真与实验验证的方式研制出3.3 kV/50 A 4H-碳化硅(SiC)结势垒肖特基(JBS)二极管芯片。芯片漂移区厚度33μm,掺杂浓度2×1015 cm-3,p+结区深度0.6μm,p+结区掺杂浓度5×1018 cm-3。芯片终端采用非均匀场限环结构。芯片静态测试表明,反向电压3.3 kV时漏电流低于100μA,正向电流50 A时压降小于2.4 V,与设计目标相符。基于该SiC JBS芯片完成了3.3 kV/400 A Si IGBT/SiC JBS混合功率模块研制,测试结果表明混合功率模块降低开关损耗明显,为实现变流装置高效化、小型化及轻量化打下了基础。
基金supported by the 13115 Innovation Engineering of Shanxi (Grant No.2008ZDKG-30)
文摘This paper reports that the 4H-SiC Schottky barrier diode, PiN diode and junction barrier Schottky diode terminated by field guard rings are designed, fabricated and characterised. The measurements for forward and reverse characteristics have been done, and by comparison with each other, it shows that junction barrier Schottky diode has a lower reverse current density than that of the Schottky barrier diode and a higher forward drop than that of the PiN diode. High-temperature annealing is presented in this paper as well to figure out an optimised processing. The barrier height of 0.79 eV is formed with Ti in this work, the forward drop for the Schottky diode is 2.1 V, with an ideality factor of 3.2, and junction barrier Schottky diode with blocking voltage higher than 400 V was achieved by using field guard ring termination.
基金Project supported by the National Natural Science Foundation of China (Grant No. 61006060)the 13115 Innovation Engineering of Shaanxi, China (Grant No. 2008ZDKG-30)the Key Laboratory Fund of Ministry of Education, China (Grant No. JY0100112501)
文摘The current-voltage characteristics of 4H-SiC junction barrier Schottky （JBS） diodes terminated by an offset field plate have been measured in the temperature range of 25-300℃. An experimental barrier height value of about 0.5 eV is obtained for the Ti/4H-SiC JBS diodes at room temperature. A decrease in the experimental barrier height and an increase in the ideality factor with decreasing temperature are shown. Reverse recovery testing also shows the temperature dependence of the peak recovery current density and the reverse recovery time. Finally, a discussion of reducing the reverse recovery time is presented.
