Vertical GaN power MOSFET is a novel technology that offers great potential for power switching applications.Being still in an early development phase,vertical GaN devices are yet to be fully optimized and require car...Vertical GaN power MOSFET is a novel technology that offers great potential for power switching applications.Being still in an early development phase,vertical GaN devices are yet to be fully optimized and require careful studies to foster their development.In this work,we report on the physical insights into device performance improvements obtained during the development of vertical GaN-on-Si trench MOSFETs(TMOS’s)provided by TCAD simulations,enhancing the dependability of the adopted process optimization approaches.Specifically,two different TMOS devices are compared in terms of transfer-curve hysteresis(H)and subthreshold slope(SS),showing a≈75%H reduction along with a≈30%SS decrease.Simulations allow attributing the achieved improvements to a decrease in the border and interface traps,respectively.A sensitivity analysis is also carried out,allowing to quantify the additional trap density reduction required to minimize both figures of merit.展开更多
航天器运行在恶劣的空间环境中容易引发充放电现象,而叠加电磁场会导致其在较低的充电电位下发生放电,严重威胁航天器的安全运行。为揭示强电磁场诱发真空沿面放电的机理并提出抑制方法,该文采用离子交换方法对聚酰亚胺(polyimide,PI)...航天器运行在恶劣的空间环境中容易引发充放电现象,而叠加电磁场会导致其在较低的充电电位下发生放电,严重威胁航天器的安全运行。为揭示强电磁场诱发真空沿面放电的机理并提出抑制方法,该文采用离子交换方法对聚酰亚胺(polyimide,PI)薄膜表面进行改性处理,并基于搭建的强电磁场诱发真空沿面放电平台,结合表面陷阱、二次电子发射系数(secondary electron emission yields,SEEY)等表征手段,系统分析表面改性对抑制强电磁场诱发PI薄膜沿面放电的机理。结果表明:改性后的PI表面引入大量浅陷阱,显著降低PI薄膜的表面电阻率和SEEY,并提升了材料表面电荷的积聚与消散速率。同时,浅陷阱的引入降低了PI薄膜的SEEY和直流场下的极化能,抑制气体的解吸附与电离及二次电子倍增过程,从而显著提升了PI薄膜在抑制强电磁场诱发真空沿面放电方面的能力。该研究有望为强电磁场诱发航天器表面沿面放电的防护设计提供参考。展开更多
This paper studies the degradation of device parameters and that of stress induced leakage current （SILC） of thin tunnel gate oxide under channel hot electron （CHE） stress at high temperature by using n-channel me...This paper studies the degradation of device parameters and that of stress induced leakage current （SILC） of thin tunnel gate oxide under channel hot electron （CHE） stress at high temperature by using n-channel metal oxide semiconductor field effect transistors （NMOSFETs） with 1.4-nm gate oxides. The degradation of device parameters under CHE stress exhibits saturating time dependence at high temperature. The emphasis of this paper is on SILC of an ultra-thin-gate-oxide under CHE stress at high temperature. Based on the experimental results, it is found that there is a linear correlation between SILC degradation and Vh degradation in NMOSFETs during CHE stress. A model of the combined effect of oxide trapped negative charges and interface traps is developed to explain the origin of SILC during CHE stress.展开更多
Lateral type n-channel 4H-SiC metal–oxide–semiconductor field effect transistors(MOSFETs),fabricated using a current industrial process,are irradiated with gamma rays at different irradiation doses in this paper to ...Lateral type n-channel 4H-SiC metal–oxide–semiconductor field effect transistors(MOSFETs),fabricated using a current industrial process,are irradiated with gamma rays at different irradiation doses in this paper to carry out a profound study on the generation mechanism of radiation-induced interface traps and oxide trapped charges.Electrical parameters(e.g.,threshold voltage,subthreshold swing and channel mobility)of the device before and after irradiation are investigated,and the influence of the channel orientation([1100]and[1120])on the radiation effect is discussed for the first time.A positive threshold voltage shift is observed at very low irradiation doses(<100 krad(Si));the threshold voltage then shifts negatively as the dose increases.It is found that the dependence of interface trap generation on the radiation dose is not the same for doses below and above 100 krad.For irradiation doses<100 krad,the radiation-induced interface traps with relatively high generation speeds dominate the competition with radiation-induced oxide trapped charges,contributing to the positive threshold voltage shift correspondingly.All these results provide additional insight into the radiation-induced charge trapping mechanism in the SiO_(2)/SiC interface.展开更多
CMOS image sensors produced by the existing CMOS manufacturing process usually have difficulty achieving complete charge transfer owing to the introduction of potential barriers or Si/SiO_(2)interface state traps in t...CMOS image sensors produced by the existing CMOS manufacturing process usually have difficulty achieving complete charge transfer owing to the introduction of potential barriers or Si/SiO_(2)interface state traps in the charge transfer path,which reduces the charge transfer efficiency and image quality.Until now,scholars have only considered mechanisms that limit charge transfer from the perspectives of potential barriers and spill back effect under high illumination condition.However,the existing models have thus far ignored the charge transfer limitation due to Si/SiO_(2)interface state traps in the transfer gate channel,particularly under low illumination.Therefore,this paper proposes,for the first time,an analytical model for quantifying the incomplete charge transfer caused by Si/SiO_(2)interface state traps in the transfer gate channel under low illumination.This model can predict the variation rules of the number of untransferred charges and charge transfer efficiency when the trap energy level follows Gaussian distribution,exponential distribution and measured distribution.The model was verified with technology computer-aided design simulations,and the results showed that the simulation results exhibit the consistency with the proposed model.展开更多
无论氢在电子器件内部以何种形式(H2分子、H原子或H+离子)存在,均会对电子器件电离损伤产生作用,进而影响器件的抗辐照能力。本文深入研究了氢气和空气气氛条件下1 Me V电子辐照栅控横向PNP(GLPNP)型双极晶体管的辐射损伤缺陷演化行为...无论氢在电子器件内部以何种形式(H2分子、H原子或H+离子)存在,均会对电子器件电离损伤产生作用,进而影响器件的抗辐照能力。本文深入研究了氢气和空气气氛条件下1 Me V电子辐照栅控横向PNP(GLPNP)型双极晶体管的辐射损伤缺陷演化行为。利用Keithley 4200SCS半导体参数测试仪对不同气氛下辐照过程中晶体管进行在线原位电性能参数测试,研究晶体管电性能退化与电子辐照注量和氢气深度之间的关系;基于栅扫技术(GS)和深能级瞬态谱技术(DLTS),研究双极晶体管中氢诱导电离损伤缺陷演化的基本特征。研究表明,与空气气氛相比,氢气气氛下电子辐照导致GLPNP的基极电流增加显著,而集电极电流明显降低,产生更多的氧化物电荷和界面态,这些现象均说明氢气加剧双极晶体管的电离辐射损伤。展开更多
The microwave plasma oxidation under the relatively high pressure(6 kPa)region is introduced into the fabrication process of SiO2/4 H-SiC stack.By controlling the oxidation pressure,species,and temperature,the record ...The microwave plasma oxidation under the relatively high pressure(6 kPa)region is introduced into the fabrication process of SiO2/4 H-SiC stack.By controlling the oxidation pressure,species,and temperature,the record low density of interface traps(~4×10^(10)cm^(-2)·eV^(-1)@Ec-0.2 eV)is demonstrated on SiO2/SiC stack formed by microwave plasma oxidation.And high quality SiO2 with very flat interface(0.27-nm root-mean-square roughness)is obtained.High performance Si C metal–oxide–semiconductor field-effect transistors(MOSFETs)with peak field effect mobility of 44 cm^(-2)·eV^(-1)is realized without additional treatment.These results show the potential of a high-pressure plasma oxidation step for improving the channel mobility in SiC MOSFETs.展开更多
基金funding from the Electronic Component Systems for European Leadership Joint Undertaking (ECSEL JU),under grant agreement No.101007229support from the European Union’s Horizon 2020 Research and Innovation Programme,Germany,France,Belgium,Austria,Sweden,Spain,and Italy
文摘Vertical GaN power MOSFET is a novel technology that offers great potential for power switching applications.Being still in an early development phase,vertical GaN devices are yet to be fully optimized and require careful studies to foster their development.In this work,we report on the physical insights into device performance improvements obtained during the development of vertical GaN-on-Si trench MOSFETs(TMOS’s)provided by TCAD simulations,enhancing the dependability of the adopted process optimization approaches.Specifically,two different TMOS devices are compared in terms of transfer-curve hysteresis(H)and subthreshold slope(SS),showing a≈75%H reduction along with a≈30%SS decrease.Simulations allow attributing the achieved improvements to a decrease in the border and interface traps,respectively.A sensitivity analysis is also carried out,allowing to quantify the additional trap density reduction required to minimize both figures of merit.
文摘航天器运行在恶劣的空间环境中容易引发充放电现象,而叠加电磁场会导致其在较低的充电电位下发生放电,严重威胁航天器的安全运行。为揭示强电磁场诱发真空沿面放电的机理并提出抑制方法,该文采用离子交换方法对聚酰亚胺(polyimide,PI)薄膜表面进行改性处理,并基于搭建的强电磁场诱发真空沿面放电平台,结合表面陷阱、二次电子发射系数(secondary electron emission yields,SEEY)等表征手段,系统分析表面改性对抑制强电磁场诱发PI薄膜沿面放电的机理。结果表明:改性后的PI表面引入大量浅陷阱,显著降低PI薄膜的表面电阻率和SEEY,并提升了材料表面电荷的积聚与消散速率。同时,浅陷阱的引入降低了PI薄膜的SEEY和直流场下的极化能,抑制气体的解吸附与电离及二次电子倍增过程,从而显著提升了PI薄膜在抑制强电磁场诱发真空沿面放电方面的能力。该研究有望为强电磁场诱发航天器表面沿面放电的防护设计提供参考。
基金Project supported by the National Natural Science Foundation of China (Grant Nos 60736033 and 60506020)
文摘This paper studies the degradation of device parameters and that of stress induced leakage current （SILC） of thin tunnel gate oxide under channel hot electron （CHE） stress at high temperature by using n-channel metal oxide semiconductor field effect transistors （NMOSFETs） with 1.4-nm gate oxides. The degradation of device parameters under CHE stress exhibits saturating time dependence at high temperature. The emphasis of this paper is on SILC of an ultra-thin-gate-oxide under CHE stress at high temperature. Based on the experimental results, it is found that there is a linear correlation between SILC degradation and Vh degradation in NMOSFETs during CHE stress. A model of the combined effect of oxide trapped negative charges and interface traps is developed to explain the origin of SILC during CHE stress.
基金the National Natural Science Foundation of China(Grant Nos.52107190 and 62101181)China Postdoctoral Science Foundation(Grant No.2021M700203)。
文摘Lateral type n-channel 4H-SiC metal–oxide–semiconductor field effect transistors(MOSFETs),fabricated using a current industrial process,are irradiated with gamma rays at different irradiation doses in this paper to carry out a profound study on the generation mechanism of radiation-induced interface traps and oxide trapped charges.Electrical parameters(e.g.,threshold voltage,subthreshold swing and channel mobility)of the device before and after irradiation are investigated,and the influence of the channel orientation([1100]and[1120])on the radiation effect is discussed for the first time.A positive threshold voltage shift is observed at very low irradiation doses(<100 krad(Si));the threshold voltage then shifts negatively as the dose increases.It is found that the dependence of interface trap generation on the radiation dose is not the same for doses below and above 100 krad.For irradiation doses<100 krad,the radiation-induced interface traps with relatively high generation speeds dominate the competition with radiation-induced oxide trapped charges,contributing to the positive threshold voltage shift correspondingly.All these results provide additional insight into the radiation-induced charge trapping mechanism in the SiO_(2)/SiC interface.
基金supported by the National Natural Science Foundation of China(62171172).
文摘CMOS image sensors produced by the existing CMOS manufacturing process usually have difficulty achieving complete charge transfer owing to the introduction of potential barriers or Si/SiO_(2)interface state traps in the charge transfer path,which reduces the charge transfer efficiency and image quality.Until now,scholars have only considered mechanisms that limit charge transfer from the perspectives of potential barriers and spill back effect under high illumination condition.However,the existing models have thus far ignored the charge transfer limitation due to Si/SiO_(2)interface state traps in the transfer gate channel,particularly under low illumination.Therefore,this paper proposes,for the first time,an analytical model for quantifying the incomplete charge transfer caused by Si/SiO_(2)interface state traps in the transfer gate channel under low illumination.This model can predict the variation rules of the number of untransferred charges and charge transfer efficiency when the trap energy level follows Gaussian distribution,exponential distribution and measured distribution.The model was verified with technology computer-aided design simulations,and the results showed that the simulation results exhibit the consistency with the proposed model.
文摘无论氢在电子器件内部以何种形式(H2分子、H原子或H+离子)存在,均会对电子器件电离损伤产生作用,进而影响器件的抗辐照能力。本文深入研究了氢气和空气气氛条件下1 Me V电子辐照栅控横向PNP(GLPNP)型双极晶体管的辐射损伤缺陷演化行为。利用Keithley 4200SCS半导体参数测试仪对不同气氛下辐照过程中晶体管进行在线原位电性能参数测试,研究晶体管电性能退化与电子辐照注量和氢气深度之间的关系;基于栅扫技术(GS)和深能级瞬态谱技术(DLTS),研究双极晶体管中氢诱导电离损伤缺陷演化的基本特征。研究表明,与空气气氛相比,氢气气氛下电子辐照导致GLPNP的基极电流增加显著,而集电极电流明显降低,产生更多的氧化物电荷和界面态,这些现象均说明氢气加剧双极晶体管的电离辐射损伤。
基金Project supported in part by the National Key Research and Development Program of China(Grant No.2016YFB0100601)the National Natural Science Foundation of China(Grant Nos.61674169 and 61974159)the Support from a Grant-In-Aid from the Youth Innovation Promotion Association of the Chinese Academy of Sciences。
文摘The microwave plasma oxidation under the relatively high pressure(6 kPa)region is introduced into the fabrication process of SiO2/4 H-SiC stack.By controlling the oxidation pressure,species,and temperature,the record low density of interface traps(~4×10^(10)cm^(-2)·eV^(-1)@Ec-0.2 eV)is demonstrated on SiO2/SiC stack formed by microwave plasma oxidation.And high quality SiO2 with very flat interface(0.27-nm root-mean-square roughness)is obtained.High performance Si C metal–oxide–semiconductor field-effect transistors(MOSFETs)with peak field effect mobility of 44 cm^(-2)·eV^(-1)is realized without additional treatment.These results show the potential of a high-pressure plasma oxidation step for improving the channel mobility in SiC MOSFETs.
