A digital calibration technique for an ultra high-speed folding and interpolating analog-to-digital con- verter in 0.18-μm CMOS technology is presented. The similar digital calibration techniques are taken for high 3...A digital calibration technique for an ultra high-speed folding and interpolating analog-to-digital con- verter in 0.18-μm CMOS technology is presented. The similar digital calibration techniques are taken for high 3-bit flash converter and low 5-bit folding and interpolating converter, which are based on well-designed calibration reference, calibration DAC and comparators. The spice simulation and the measured results show the ADC produces 5.9 ENOB with calibration disabled and 7.2 ENOB with calibration enabled for high-frequency wide-bandwidth analog input.展开更多
With the development of current electronic technology, numerous high-speed data acquisition systems provide a variety of potential benefits. This article describes a high-speed data acquisition system which consists o...With the development of current electronic technology, numerous high-speed data acquisition systems provide a variety of potential benefits. This article describes a high-speed data acquisition system which consists of ECL logic and TTL logic devices, samples and stores data with a 1 GHz clock. This system is accomplished easily and works stably. A performance test of this system has been undertaken and the results show that the effective number of bits （ENOB） is more than 6.5 bits.展开更多
This Letter demonstrates the effectiveness of a high-speed high-resolution photonic analog-to-digital converter （PADC） for wideband signal detection. The PADC system is seeded by a high-speed actively mode locked la...This Letter demonstrates the effectiveness of a high-speed high-resolution photonic analog-to-digital converter （PADC） for wideband signal detection. The PADC system is seeded by a high-speed actively mode locked laser, and the sampling rate is multiplied via a time-wavelength interleaving scheme. According to the laboratory test, an X-band linear frequency modulation signal is detected and digitized by the PADC system. The channel mismatch effect in wideband signal detection is compensated via an algorithm based on a short-time Fourier transform. Consequently, the signal-to-distortion ratio （SDR） of the wideband signal detection is enhanced to the comparable SDR of the single-tone signal detection.展开更多
基金Project supported by the National Natural Science Foundation of China(Nos.60906009,60773025)the Postdoctoral Science Foundation of China(No.20090451423)the National Labs of Analog Integrated Circuits Foundation(No.9140C0901110902)
文摘A digital calibration technique for an ultra high-speed folding and interpolating analog-to-digital con- verter in 0.18-μm CMOS technology is presented. The similar digital calibration techniques are taken for high 3-bit flash converter and low 5-bit folding and interpolating converter, which are based on well-designed calibration reference, calibration DAC and comparators. The spice simulation and the measured results show the ADC produces 5.9 ENOB with calibration disabled and 7.2 ENOB with calibration enabled for high-frequency wide-bandwidth analog input.
文摘With the development of current electronic technology, numerous high-speed data acquisition systems provide a variety of potential benefits. This article describes a high-speed data acquisition system which consists of ECL logic and TTL logic devices, samples and stores data with a 1 GHz clock. This system is accomplished easily and works stably. A performance test of this system has been undertaken and the results show that the effective number of bits （ENOB） is more than 6.5 bits.
基金partially supported by the National Natural Science Foundation of China(Nos.61571292and 61535006)
文摘This Letter demonstrates the effectiveness of a high-speed high-resolution photonic analog-to-digital converter （PADC） for wideband signal detection. The PADC system is seeded by a high-speed actively mode locked laser, and the sampling rate is multiplied via a time-wavelength interleaving scheme. According to the laboratory test, an X-band linear frequency modulation signal is detected and digitized by the PADC system. The channel mismatch effect in wideband signal detection is compensated via an algorithm based on a short-time Fourier transform. Consequently, the signal-to-distortion ratio （SDR） of the wideband signal detection is enhanced to the comparable SDR of the single-tone signal detection.
