In this study,we present an organic field-effect transistor floating-gate memory using polysilicon(poly-Si)as a charge trapping layer.The memory device is fabricated on a N^+-Si/SiO2 substrate.Poly-Si,polymethylmethac...In this study,we present an organic field-effect transistor floating-gate memory using polysilicon(poly-Si)as a charge trapping layer.The memory device is fabricated on a N^+-Si/SiO2 substrate.Poly-Si,polymethylmethacrylate,and pentacene are used as a floating-gate layer,tunneling layer,and active layer,respectively.The device shows bidirectional storage characteristics under the action of programming/erasing(P/E)operation due to the supplied electrons and holes in the channel and the bidirectional charge trapping characteristic of the poly-Si floating-gate.The carrier mobility and switching current ratio(Ion/Ioff ratio)of the device with a tunneling layer thickness of 85 nm are 0.01 cm^2·V^-1·s^-1 and 102,respectively.A large memory window of 9.28 V can be obtained under a P/E voltage of±60 V.展开更多
In this paper, we present a solution to the ultra low voltage inverter by adding a keeper transistor in order to make the semi-floating-gate more stable and to reduce the current dissipation. Moreover, we also present...In this paper, we present a solution to the ultra low voltage inverter by adding a keeper transistor in order to make the semi-floating-gate more stable and to reduce the current dissipation. Moreover, we also present a differential ULV inverter and elaborate on the reliability and fault tolerance of the gate. The differential ULV gate compared to both a former ULV gate and standard CMOS are given. The results are obtained through Monte-Carlo simulations.展开更多
Synaptic devices that merge memory and processing functions into one unit have broad application potentials in neuromorphic computing, soft robots, and humanmachine interfaces. However, most previously reported synapt...Synaptic devices that merge memory and processing functions into one unit have broad application potentials in neuromorphic computing, soft robots, and humanmachine interfaces. However, most previously reported synaptic devices exhibit fixed performance once been fabricated,which limits their application in diverse scenarios. Here, we report floating-gate photosensitive synaptic transistors with charge-trapping perovskite quantum dots(PQDs) and atomic layer deposited(ALD) Al_(2)O_(3) tunneling layers, which exhibit typical synaptic behaviors including excitatory postsynaptic current(EPSC), pair-pulse facilitation and dynamic filtering characteristics under both electrical or optical signal stimulation. Further, the combination of the high-quality Al2O3 tuning layer and highly photosensitive PQDs charge-trapping layer provides the devices with extensively tunable synaptic performance under optical and electrical co-modulation. Applying light during electrical modulation can significantly improve both the synaptic weight changes and the nonlinearity of weight updates, while the memory effect under light modulation can be obviously adjusted by the gate voltage.The pattern learning and forgetting processes for "0" and "1"with different synaptic weights and memory times are further demonstrated in the device array. Overall, this work provides synaptic devices with tunable functions for building complex and robust artificial neural networks.展开更多
Flash memory with high operation speed and stable retention performance is in great demand to meet the requirements of big data.In addition,the realisation of ultrafast flash memory with novel functions offers a means...Flash memory with high operation speed and stable retention performance is in great demand to meet the requirements of big data.In addition,the realisation of ultrafast flash memory with novel functions offers a means of combining heterogeneous components into a homogeneous device without considering impedance matching.This report proposes a 20 ns programme flash memory with 10^(8) self-rectifying ratios based on a 0.65 nm-thick MoS_(2)-channel transistor.A high-quality van der Waals heterojunction with a sharp interface is formed between the Cr/Au metal floating layer and h-BN tunnelling layer.In addition,the large rectification ratio and low ideality factor(n=1.13)facilitate the application of the MoS_(2)-channel flash memory as a bit-line select transistor.Finally,owing to the ultralow MoS_(2)/h-BN heterojunction capacitance(50 fF),the memory device exhibits superior performance as a high-frequency(up to 1 MHz)sine signal rectifier.These results pave the way toward the potential utilisation of multifunctional memory devices in ultrafast two-dimensional NAND-flash applications.展开更多
文摘In this study,we present an organic field-effect transistor floating-gate memory using polysilicon(poly-Si)as a charge trapping layer.The memory device is fabricated on a N^+-Si/SiO2 substrate.Poly-Si,polymethylmethacrylate,and pentacene are used as a floating-gate layer,tunneling layer,and active layer,respectively.The device shows bidirectional storage characteristics under the action of programming/erasing(P/E)operation due to the supplied electrons and holes in the channel and the bidirectional charge trapping characteristic of the poly-Si floating-gate.The carrier mobility and switching current ratio(Ion/Ioff ratio)of the device with a tunneling layer thickness of 85 nm are 0.01 cm^2·V^-1·s^-1 and 102,respectively.A large memory window of 9.28 V can be obtained under a P/E voltage of±60 V.
文摘In this paper, we present a solution to the ultra low voltage inverter by adding a keeper transistor in order to make the semi-floating-gate more stable and to reduce the current dissipation. Moreover, we also present a differential ULV inverter and elaborate on the reliability and fault tolerance of the gate. The differential ULV gate compared to both a former ULV gate and standard CMOS are given. The results are obtained through Monte-Carlo simulations.
基金supported by the National Natural Science Foundation of China (61874029)。
文摘Synaptic devices that merge memory and processing functions into one unit have broad application potentials in neuromorphic computing, soft robots, and humanmachine interfaces. However, most previously reported synaptic devices exhibit fixed performance once been fabricated,which limits their application in diverse scenarios. Here, we report floating-gate photosensitive synaptic transistors with charge-trapping perovskite quantum dots(PQDs) and atomic layer deposited(ALD) Al_(2)O_(3) tunneling layers, which exhibit typical synaptic behaviors including excitatory postsynaptic current(EPSC), pair-pulse facilitation and dynamic filtering characteristics under both electrical or optical signal stimulation. Further, the combination of the high-quality Al2O3 tuning layer and highly photosensitive PQDs charge-trapping layer provides the devices with extensively tunable synaptic performance under optical and electrical co-modulation. Applying light during electrical modulation can significantly improve both the synaptic weight changes and the nonlinearity of weight updates, while the memory effect under light modulation can be obviously adjusted by the gate voltage.The pattern learning and forgetting processes for "0" and "1"with different synaptic weights and memory times are further demonstrated in the device array. Overall, this work provides synaptic devices with tunable functions for building complex and robust artificial neural networks.
基金This work was supported by the National Natural Science Foundation of China(Grant Nos.62004042,61925402,61851402,and 61734003).The authors would like to acknowledge the support by the Young Scientist project of the MoE innovation platform.The authors would also like to acknowledge Professor Ning Sheng Xu for the valuable advice on thesis writing.
文摘Flash memory with high operation speed and stable retention performance is in great demand to meet the requirements of big data.In addition,the realisation of ultrafast flash memory with novel functions offers a means of combining heterogeneous components into a homogeneous device without considering impedance matching.This report proposes a 20 ns programme flash memory with 10^(8) self-rectifying ratios based on a 0.65 nm-thick MoS_(2)-channel transistor.A high-quality van der Waals heterojunction with a sharp interface is formed between the Cr/Au metal floating layer and h-BN tunnelling layer.In addition,the large rectification ratio and low ideality factor(n=1.13)facilitate the application of the MoS_(2)-channel flash memory as a bit-line select transistor.Finally,owing to the ultralow MoS_(2)/h-BN heterojunction capacitance(50 fF),the memory device exhibits superior performance as a high-frequency(up to 1 MHz)sine signal rectifier.These results pave the way toward the potential utilisation of multifunctional memory devices in ultrafast two-dimensional NAND-flash applications.
