本文介绍了应用于背板通信系统中均衡器的设计与实现.该均衡器采用连续时间线性均衡器(Continuous Time Linear Equalizer,CTLE)和2抽头判决反馈均衡器(Decision Feedback Equalizer,DFE)的组合结构来消除信道码间干扰中的前标分量和后...本文介绍了应用于背板通信系统中均衡器的设计与实现.该均衡器采用连续时间线性均衡器(Continuous Time Linear Equalizer,CTLE)和2抽头判决反馈均衡器(Decision Feedback Equalizer,DFE)的组合结构来消除信道码间干扰中的前标分量和后标分量.在设计中,CTLE采用双路均衡器结构补偿信道不同频率的损耗,减小了电路的面积和功耗;DFE采用半速率预处理结构来缓解传统DFE结构中关键反馈路径的时序限制,并采用模拟最小均方(Least Mean Square,LMS)算法电路控制DFE系数的自适应.电路采用IBM 0.13μm Bi CMOS工艺设计并实现,测试结果表明对于经过18英寸背板后眼图完全闭合的24Gb/s的信号,均衡后的眼图水平张开度达到了0.81UI.整个均衡器芯片包括焊盘在内的芯片面积为0.78×0.8mm^2,在3.3V的电源电压下,功耗为624m W.展开更多
判决反馈均衡器(Decision Feedback Equalizer,DFE)能补偿具有严重符号间干扰(Inter Symbol Interference,ISI)的信道,且不存在线性均衡器增强噪声的影响。而在其基础上改进的运用误差反馈的DFE,可利用误差反馈滤波器来减少传统DFE中存...判决反馈均衡器(Decision Feedback Equalizer,DFE)能补偿具有严重符号间干扰(Inter Symbol Interference,ISI)的信道,且不存在线性均衡器增强噪声的影响。而在其基础上改进的运用误差反馈的DFE,可利用误差反馈滤波器来减少传统DFE中存在的误差信号的相关性,同时其硬件实现的复杂度没有明显提高。理论分析和仿真表明,这种方法比传统的DFE更有效,特别是针对信道有严重符号间干扰的情况。展开更多
This paper presents a 0.18μm CMOS 6.25 Gb/s equalizer for high speed backplane communication. The proposed equalizer is a combined one consisting of a one-tap feed-forward equalizer （FFE） and a two-tap half-rate de...This paper presents a 0.18μm CMOS 6.25 Gb/s equalizer for high speed backplane communication. The proposed equalizer is a combined one consisting of a one-tap feed-forward equalizer （FFE） and a two-tap half-rate decision feedback equalizer （DFE） in order to cancel both pre-cursor and post-cursor ISI. By employing an active-inductive peaking circuit for the delay line, the bandwidth of the FFE is increased and the area cost is minimized. CML-based circuits such as DFFs, summers and multiplexes all help to improve the speed of DFEs. Measurement results illustrate that the equalizer operates well when equalizing 6.25 Gb/s data is passed over a 30-inch channel with a loss of 22 dB and consumes 55.8 mW with the supply voltage of 1.8 V. The overall chip area including pads is 0.3 × 0.5 mm^2.展开更多
We propose an efficient low bit error rate(BER) and low complexity multiple-input multiple-output(MIMO) multiuser detection(MUD) method for use with multiuser MIMO orthogonal frequency division multiplexing(OFDM) syst...We propose an efficient low bit error rate(BER) and low complexity multiple-input multiple-output(MIMO) multiuser detection(MUD) method for use with multiuser MIMO orthogonal frequency division multiplexing(OFDM) systems.It is a hybrid method combining a multiuser-interference-cancellation-based decision feedback equalizer using error feedback filter(MIMO MIC DFE-EFF) and a differential algorithm.The proposed method,termed 'MIMO MIC DFE-EFF with a differential algorithm' for short,has a multiuser feedback structure.We describe the schemes of MIMO MIC DFE-EFF and MIMO MIC DFE-EFF with a differential algorithm,and compare their minimum mean square error(MMSE) performance and computational complexity.Simulation results show that a significant performance gain can be achieved by employing the MIMO MIC DFE-EFF detection algorithm in the context of a multiuser MIMO-OFDM system over frequency selective Rayleigh channel.MIMO MIC DFE-EFF with the differential algorithm improves both computational efficiency and BER performance in a multistage structure relative to conventional DFE-EFF,though there is a small reduction in system performance compared with MIMO MIC DFE-EFF without the differential algorithm.展开更多
文摘本文介绍了应用于背板通信系统中均衡器的设计与实现.该均衡器采用连续时间线性均衡器(Continuous Time Linear Equalizer,CTLE)和2抽头判决反馈均衡器(Decision Feedback Equalizer,DFE)的组合结构来消除信道码间干扰中的前标分量和后标分量.在设计中,CTLE采用双路均衡器结构补偿信道不同频率的损耗,减小了电路的面积和功耗;DFE采用半速率预处理结构来缓解传统DFE结构中关键反馈路径的时序限制,并采用模拟最小均方(Least Mean Square,LMS)算法电路控制DFE系数的自适应.电路采用IBM 0.13μm Bi CMOS工艺设计并实现,测试结果表明对于经过18英寸背板后眼图完全闭合的24Gb/s的信号,均衡后的眼图水平张开度达到了0.81UI.整个均衡器芯片包括焊盘在内的芯片面积为0.78×0.8mm^2,在3.3V的电源电压下,功耗为624m W.
文摘判决反馈均衡器(Decision Feedback Equalizer,DFE)能补偿具有严重符号间干扰(Inter Symbol Interference,ISI)的信道,且不存在线性均衡器增强噪声的影响。而在其基础上改进的运用误差反馈的DFE,可利用误差反馈滤波器来减少传统DFE中存在的误差信号的相关性,同时其硬件实现的复杂度没有明显提高。理论分析和仿真表明,这种方法比传统的DFE更有效,特别是针对信道有严重符号间干扰的情况。
文摘This paper presents a 0.18μm CMOS 6.25 Gb/s equalizer for high speed backplane communication. The proposed equalizer is a combined one consisting of a one-tap feed-forward equalizer （FFE） and a two-tap half-rate decision feedback equalizer （DFE） in order to cancel both pre-cursor and post-cursor ISI. By employing an active-inductive peaking circuit for the delay line, the bandwidth of the FFE is increased and the area cost is minimized. CML-based circuits such as DFFs, summers and multiplexes all help to improve the speed of DFEs. Measurement results illustrate that the equalizer operates well when equalizing 6.25 Gb/s data is passed over a 30-inch channel with a loss of 22 dB and consumes 55.8 mW with the supply voltage of 1.8 V. The overall chip area including pads is 0.3 × 0.5 mm^2.
基金supported by the National Science and Technology Pillar Program (Nos 2008BAH30B12 and 2008BAH30B09)the Important National Science and Technology Specific Projects (Nos 2008ZX 03003-004, 2009ZX03003-008, 2009ZX03003-009, and 2009ZX 03002-009)+1 种基金the National Natural Science Foundation of China (No 60802009)the National High-Tech R & D Program (863) of China (Nos 2008AA01Z204 and 2009AA01Z205)
文摘We propose an efficient low bit error rate(BER) and low complexity multiple-input multiple-output(MIMO) multiuser detection(MUD) method for use with multiuser MIMO orthogonal frequency division multiplexing(OFDM) systems.It is a hybrid method combining a multiuser-interference-cancellation-based decision feedback equalizer using error feedback filter(MIMO MIC DFE-EFF) and a differential algorithm.The proposed method,termed 'MIMO MIC DFE-EFF with a differential algorithm' for short,has a multiuser feedback structure.We describe the schemes of MIMO MIC DFE-EFF and MIMO MIC DFE-EFF with a differential algorithm,and compare their minimum mean square error(MMSE) performance and computational complexity.Simulation results show that a significant performance gain can be achieved by employing the MIMO MIC DFE-EFF detection algorithm in the context of a multiuser MIMO-OFDM system over frequency selective Rayleigh channel.MIMO MIC DFE-EFF with the differential algorithm improves both computational efficiency and BER performance in a multistage structure relative to conventional DFE-EFF,though there is a small reduction in system performance compared with MIMO MIC DFE-EFF without the differential algorithm.
