This paper focuses on advanced analysis techniques and design considerations of DC interference generated by HVDC electrodes during normal bipolar and temporary monopolar operations on neighboring metallic utilities, ...This paper focuses on advanced analysis techniques and design considerations of DC interference generated by HVDC electrodes during normal bipolar and temporary monopolar operations on neighboring metallic utilities, with a special emphasis on buried gas and oil pipelines. This study examines the level of pipeline corrosion, the safety status in the vicinity of exposed appurtenances and the impact of DC interference on the integrity of insulating flanges and impressed current cathodic protection (ICCP) systems. Computation results obtained for different soil models show that different soils can lead to completely different DC interference effects. The results and conclusions presented here can be used as a reference to analyze the severity of DC interference on pipelines due to proximate HVDC electrodes.展开更多
A synchronous boost DC-DC converter with an adaptive dead time control （DTC） circuit and antiringing circuit is presented. The DTC circuit is used to provide adjustable dead time and zero inductor current detection ...A synchronous boost DC-DC converter with an adaptive dead time control （DTC） circuit and antiringing circuit is presented. The DTC circuit is used to provide adjustable dead time and zero inductor current detection for power transistors and therefore, a high efficiency is achieved by minimizing power losses, such as the shoot-through current loss, the body diode conduction loss, the charge-sharing loss and the reverse inductor current loss. Simultaneously, a novel anti-ringing circuit controlled by the switching sequence of power transistors is developed to suppress the ringing when the converter enters the discontinuous conduction mode （DCM） for low electromagnetic interference （EMI） and additional power savings. The proposed converter has been fabricated in a 0.6 #m CDMOS technology. Simulation and experimental results show that the power efficiency of the boost converter is above 81% under different load currents from 10 to 250 mA and a peak efficiency of 90% is achieved at about 100 mA. Moreover, the ringing is easily suppressed by the anti-ringing circuit and therefore the EMI noise is attenuated.展开更多
文摘This paper focuses on advanced analysis techniques and design considerations of DC interference generated by HVDC electrodes during normal bipolar and temporary monopolar operations on neighboring metallic utilities, with a special emphasis on buried gas and oil pipelines. This study examines the level of pipeline corrosion, the safety status in the vicinity of exposed appurtenances and the impact of DC interference on the integrity of insulating flanges and impressed current cathodic protection (ICCP) systems. Computation results obtained for different soil models show that different soils can lead to completely different DC interference effects. The results and conclusions presented here can be used as a reference to analyze the severity of DC interference on pipelines due to proximate HVDC electrodes.
基金supported by the National Natural Science Foundation of China(No.61106026)the Fundamental Research Funds for the Central Universities of China(No.K50511020028)
文摘A synchronous boost DC-DC converter with an adaptive dead time control （DTC） circuit and antiringing circuit is presented. The DTC circuit is used to provide adjustable dead time and zero inductor current detection for power transistors and therefore, a high efficiency is achieved by minimizing power losses, such as the shoot-through current loss, the body diode conduction loss, the charge-sharing loss and the reverse inductor current loss. Simultaneously, a novel anti-ringing circuit controlled by the switching sequence of power transistors is developed to suppress the ringing when the converter enters the discontinuous conduction mode （DCM） for low electromagnetic interference （EMI） and additional power savings. The proposed converter has been fabricated in a 0.6 #m CDMOS technology. Simulation and experimental results show that the power efficiency of the boost converter is above 81% under different load currents from 10 to 250 mA and a peak efficiency of 90% is achieved at about 100 mA. Moreover, the ringing is easily suppressed by the anti-ringing circuit and therefore the EMI noise is attenuated.
