近年来,抽水蓄能电站发展迅猛,抽水蓄能电站在稳定系统电压方面有着优越的性能,因此抽水蓄能电站自动电压控制(AVC-Automatic Voltage Control)是非常有意义的。本文介绍了宜兴抽水蓄能电站一次接线方式、机组运行方式和机组出力能力;...近年来,抽水蓄能电站发展迅猛,抽水蓄能电站在稳定系统电压方面有着优越的性能,因此抽水蓄能电站自动电压控制(AVC-Automatic Voltage Control)是非常有意义的。本文介绍了宜兴抽水蓄能电站一次接线方式、机组运行方式和机组出力能力;根据抽水蓄能机组特性,论述了抽水蓄能机组无功功率出力能力限制。结合抽水蓄能电站的运行工况,探讨了其自动电压控制的基本思想和控制原则。展开更多
In this work, an original Sallen-Key second-order low-pass filter is first turned into a current-mode one by means of the adjoint network theorem. Two nodal admittance matrices(NAM) of the filter are then educed. Furt...In this work, an original Sallen-Key second-order low-pass filter is first turned into a current-mode one by means of the adjoint network theorem. Two nodal admittance matrices(NAM) of the filter are then educed. Furthermore, these two matrices are expanded through NAM expansion approach, generating one current-mode Sallen-Key filter, which uses two compact voltage differential trans-conductance amplifiers(VDTAs) and two grounded capacitors, implements not only one low-pass transfer function but two band-pass transfer functions, and provides the non-interrelated control between the natural frequency and quality factor. As an example of the synthesized filter, a second-order VDTA filter with fo=1 MHz, Q=1, HLP=-HBP1=HBP2=1 is designed. The used synthesis approach has been confirmed with the help of circuit and computer analysis.展开更多
A new multi function voltage-mode universal biquadratic filter using single Voltage Differencing Differential Input Buffered Amplifier (VD-DIBA), two capacitors and one resistor is proposed. The proposed configuration...A new multi function voltage-mode universal biquadratic filter using single Voltage Differencing Differential Input Buffered Amplifier (VD-DIBA), two capacitors and one resistor is proposed. The proposed configuration has four inputs and one output and can realize all the five standard filters from the same circuit configuration. The presented biquad filter offers low active and passive sensitivities. The validity of proposed universal biquadratic filter has been verified by SPICE simulation using 0.35 μm MIETEC technology.展开更多
In this paper, an application of voltage differencing voltage transconductance amplifier (VDVTA) in the realization of voltage-mode (VM) multi-input single output (MISO) type biquad is presented. The proposed topology...In this paper, an application of voltage differencing voltage transconductance amplifier (VDVTA) in the realization of voltage-mode (VM) multi-input single output (MISO) type biquad is presented. The proposed topology uses one VDVTA as an active element, two capacitors and a grounded resistor. The configuration realizes low pass (LP), high pass (HP), band pass (BP) and notch (BR) filters without the requirement of any matching condition. The natural frequency (w0) and bandwidth (BW) are independently controllable. The proposed circuit offers low active and passive sensitivities of w0. The operation of the proposed circuit has been verified through SPICE simulation with TSMC CMOS 0.18 μm process parameters.展开更多
This paper proposes novel floating-gate MOSFET (FGMOS) based Voltage Buffer, Analog Inverter and Winner-Take-All (WTA) circuits. The proposed circuits have low power dissipation. All proposed circuits are simulated us...This paper proposes novel floating-gate MOSFET (FGMOS) based Voltage Buffer, Analog Inverter and Winner-Take-All (WTA) circuits. The proposed circuits have low power dissipation. All proposed circuits are simulated using SPICE in 180 nm CMOS technology with supply voltages of ±1.25 V. The simulation results demonstrate increase in input range for FGMOS based voltage buffer and analog inverter and maximum power dissipation of 0.5 mW, 1.9 mW and 0.429 mW for FGMOS based voltage buffer, analog inverter and WTA circuits, respectively. The proposed circuits are intended to find applications in low voltage, low power consumer electronics.展开更多
A 1.8V 8b 125Msample/s pipelined A/D converter is presented.Power efficiency is optimized by size scaling down scheme using low power single stage cascode amplifier with a gain boosted structure.Global clock tree and ...A 1.8V 8b 125Msample/s pipelined A/D converter is presented.Power efficiency is optimized by size scaling down scheme using low power single stage cascode amplifier with a gain boosted structure.Global clock tree and local generators are employed to avoid loss and overlap of clock period.The ADC achieves a signal-to-noise-and-distortion ratio (SNDR) of 49.5dB(7.9ENOB) for an input of 62MHz at full speed of 125MHz,consuming only 71mW.It is implemented in 0.18μm CMOS technology with a core area of 0.45mm 2.展开更多
A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly red...A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly reduced. Based on this exasperate antenna performance,a new rectifier with high power conversion efficiency and low turn-on voltage is presented. The circuit is implemented in an SMIC 0.18μm EEPROM process. Measurement results show that with a 120kΩ load,the power conversion efficiency reaches as high as 36%. For a sinusoidal wave with magnitude of 0. 5V, the output DC voltage reaches IV,which is high enough for RFID tags. The read distance is as far as 22cm.展开更多
A test strategy for analog filters was proposed. The output voltage and supply current of the circuit were monitored when using the oscillation test technique. The frequency, average value, maximum value and amplitude...A test strategy for analog filters was proposed. The output voltage and supply current of the circuit were monitored when using the oscillation test technique. The frequency, average value, maximum value and amplitude of both output voltage and supply current were taken as test parameters. Tolerance bands of test parameters were analyzed. Fault detectabilities of test parameters were compared and combined, and optimal parameter sets were derived. Experimental results show that both the output voltage and supply current give significant contribution to fault detection. Considering catastrophic, single and double parametric faults, the fault coverage in testing the benchmark circuit can be raised from 90.6% for traditional voltageonly oscillation test strategy to 97.2% by monitoring both output voltage and current parameters.展开更多
文摘近年来,抽水蓄能电站发展迅猛,抽水蓄能电站在稳定系统电压方面有着优越的性能,因此抽水蓄能电站自动电压控制(AVC-Automatic Voltage Control)是非常有意义的。本文介绍了宜兴抽水蓄能电站一次接线方式、机组运行方式和机组出力能力;根据抽水蓄能机组特性,论述了抽水蓄能机组无功功率出力能力限制。结合抽水蓄能电站的运行工况,探讨了其自动电压控制的基本思想和控制原则。
基金the Natural Science Foundation of Shaanxi Province (2017JM6087)。
文摘In this work, an original Sallen-Key second-order low-pass filter is first turned into a current-mode one by means of the adjoint network theorem. Two nodal admittance matrices(NAM) of the filter are then educed. Furthermore, these two matrices are expanded through NAM expansion approach, generating one current-mode Sallen-Key filter, which uses two compact voltage differential trans-conductance amplifiers(VDTAs) and two grounded capacitors, implements not only one low-pass transfer function but two band-pass transfer functions, and provides the non-interrelated control between the natural frequency and quality factor. As an example of the synthesized filter, a second-order VDTA filter with fo=1 MHz, Q=1, HLP=-HBP1=HBP2=1 is designed. The used synthesis approach has been confirmed with the help of circuit and computer analysis.
文摘A new multi function voltage-mode universal biquadratic filter using single Voltage Differencing Differential Input Buffered Amplifier (VD-DIBA), two capacitors and one resistor is proposed. The proposed configuration has four inputs and one output and can realize all the five standard filters from the same circuit configuration. The presented biquad filter offers low active and passive sensitivities. The validity of proposed universal biquadratic filter has been verified by SPICE simulation using 0.35 μm MIETEC technology.
文摘In this paper, an application of voltage differencing voltage transconductance amplifier (VDVTA) in the realization of voltage-mode (VM) multi-input single output (MISO) type biquad is presented. The proposed topology uses one VDVTA as an active element, two capacitors and a grounded resistor. The configuration realizes low pass (LP), high pass (HP), band pass (BP) and notch (BR) filters without the requirement of any matching condition. The natural frequency (w0) and bandwidth (BW) are independently controllable. The proposed circuit offers low active and passive sensitivities of w0. The operation of the proposed circuit has been verified through SPICE simulation with TSMC CMOS 0.18 μm process parameters.
文摘This paper proposes novel floating-gate MOSFET (FGMOS) based Voltage Buffer, Analog Inverter and Winner-Take-All (WTA) circuits. The proposed circuits have low power dissipation. All proposed circuits are simulated using SPICE in 180 nm CMOS technology with supply voltages of ±1.25 V. The simulation results demonstrate increase in input range for FGMOS based voltage buffer and analog inverter and maximum power dissipation of 0.5 mW, 1.9 mW and 0.429 mW for FGMOS based voltage buffer, analog inverter and WTA circuits, respectively. The proposed circuits are intended to find applications in low voltage, low power consumer electronics.
文摘A 1.8V 8b 125Msample/s pipelined A/D converter is presented.Power efficiency is optimized by size scaling down scheme using low power single stage cascode amplifier with a gain boosted structure.Global clock tree and local generators are employed to avoid loss and overlap of clock period.The ADC achieves a signal-to-noise-and-distortion ratio (SNDR) of 49.5dB(7.9ENOB) for an input of 62MHz at full speed of 125MHz,consuming only 71mW.It is implemented in 0.18μm CMOS technology with a core area of 0.45mm 2.
文摘A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly reduced. Based on this exasperate antenna performance,a new rectifier with high power conversion efficiency and low turn-on voltage is presented. The circuit is implemented in an SMIC 0.18μm EEPROM process. Measurement results show that with a 120kΩ load,the power conversion efficiency reaches as high as 36%. For a sinusoidal wave with magnitude of 0. 5V, the output DC voltage reaches IV,which is high enough for RFID tags. The read distance is as far as 22cm.
基金the National Key Basic Research and Development (973) Program of China(No. 2005CB321604)the National Natural Science Foundation of China (No. 60633060)
文摘A test strategy for analog filters was proposed. The output voltage and supply current of the circuit were monitored when using the oscillation test technique. The frequency, average value, maximum value and amplitude of both output voltage and supply current were taken as test parameters. Tolerance bands of test parameters were analyzed. Fault detectabilities of test parameters were compared and combined, and optimal parameter sets were derived. Experimental results show that both the output voltage and supply current give significant contribution to fault detection. Considering catastrophic, single and double parametric faults, the fault coverage in testing the benchmark circuit can be raised from 90.6% for traditional voltageonly oscillation test strategy to 97.2% by monitoring both output voltage and current parameters.
