介绍了一种基于FPGA技术的TDC(Time to Digital Convertor)的实现,利用FPGA中加法器固有的进位链的延迟实现时间内插电路来完成TDC中的细计数部分。此TDC结构是一种基于最新的WUTDC(Wave Union TDC)技术,通过再次细分进位链中的超宽码...介绍了一种基于FPGA技术的TDC(Time to Digital Convertor)的实现,利用FPGA中加法器固有的进位链的延迟实现时间内插电路来完成TDC中的细计数部分。此TDC结构是一种基于最新的WUTDC(Wave Union TDC)技术,通过再次细分进位链中的超宽码来提高测量精度。经过板级测试和在线调试,证明该转换电路线性度良好,RMS精度好于40 ps。展开更多
Up to now, the wave union method can achieve the best timing performance in FPGA-based TDC designs. However, it should be guaranteed in such a structure that the non-thermometer code to binary code （NTH2B） encoding ...Up to now, the wave union method can achieve the best timing performance in FPGA-based TDC designs. However, it should be guaranteed in such a structure that the non-thermometer code to binary code （NTH2B） encoding process should be finished within just one system clock cycle. So the implementation of the NTH2B encoder is quite challenging considering the high speed requirement. Besides, the high resolution wave union TDC also demands that the encoder convert an ultra-wide input code to a binary code. We present a fast improved fat tree encoder （IFTE） to fulfill such requirements, in which bubble error suppression is also integrated. With this encoder scheme, a wave union TDC with 7.7 ps RMS and 3.8 ps effective bin size was implemented in an FPGA from Xilinx Virtex 5 family. An encoding time of 8.33 ns was achieved for a 276-bit non-thermometer code to a 9-bit binary code conversion. We conducted a series of tests on the oscillating period of the wave union launcher, as well as the overall performance of the TDC; test results indicate that the IFTE works well. In fact, in the implementation of this encoder, no manual routing or special constraints were required; therefore, this IFTE structure could also be further applied in other delay-chain-based FPGA TDCs.展开更多
编码复杂的Wave Union决定了时间数字转换器的"死时间"。如选择合适的发射器延时单元个数,改Wave Union A的单次发射为连续发射就形成了新的Wave Union C(WUC)。采用Wallace树和ROM结构的WUC编码器使用资源少、延时路径短,在A...编码复杂的Wave Union决定了时间数字转换器的"死时间"。如选择合适的发射器延时单元个数,改Wave Union A的单次发射为连续发射就形成了新的Wave Union C(WUC)。采用Wallace树和ROM结构的WUC编码器使用资源少、延时路径短,在Altera的EP3C10E144C8中,时钟频率为400MHz,延时链长度为80的情况下,仅使用了166个逻辑单元,编码时间为2.089ns。WUC实时自动校准避免了全延时链的按位校准,只需对发射器内的延时单元进行校准,且实时自动校准在硬件上只需提供一个不随外界温度和电压变化的TDC时钟且延时链长度增加1倍即可。展开更多
文摘介绍了一种基于FPGA技术的TDC(Time to Digital Convertor)的实现,利用FPGA中加法器固有的进位链的延迟实现时间内插电路来完成TDC中的细计数部分。此TDC结构是一种基于最新的WUTDC(Wave Union TDC)技术,通过再次细分进位链中的超宽码来提高测量精度。经过板级测试和在线调试,证明该转换电路线性度良好,RMS精度好于40 ps。
基金Knowledge Innovation Program of the Chinese Academy of Sciences (KJCX2-YW-N27)National Natural Science Foundation of China (11222552)Fundamental Research Funds for Central Universities (WK2030040015)
文摘Up to now, the wave union method can achieve the best timing performance in FPGA-based TDC designs. However, it should be guaranteed in such a structure that the non-thermometer code to binary code （NTH2B） encoding process should be finished within just one system clock cycle. So the implementation of the NTH2B encoder is quite challenging considering the high speed requirement. Besides, the high resolution wave union TDC also demands that the encoder convert an ultra-wide input code to a binary code. We present a fast improved fat tree encoder （IFTE） to fulfill such requirements, in which bubble error suppression is also integrated. With this encoder scheme, a wave union TDC with 7.7 ps RMS and 3.8 ps effective bin size was implemented in an FPGA from Xilinx Virtex 5 family. An encoding time of 8.33 ns was achieved for a 276-bit non-thermometer code to a 9-bit binary code conversion. We conducted a series of tests on the oscillating period of the wave union launcher, as well as the overall performance of the TDC; test results indicate that the IFTE works well. In fact, in the implementation of this encoder, no manual routing or special constraints were required; therefore, this IFTE structure could also be further applied in other delay-chain-based FPGA TDCs.
文摘编码复杂的Wave Union决定了时间数字转换器的"死时间"。如选择合适的发射器延时单元个数,改Wave Union A的单次发射为连续发射就形成了新的Wave Union C(WUC)。采用Wallace树和ROM结构的WUC编码器使用资源少、延时路径短,在Altera的EP3C10E144C8中,时钟频率为400MHz,延时链长度为80的情况下,仅使用了166个逻辑单元,编码时间为2.089ns。WUC实时自动校准避免了全延时链的按位校准,只需对发射器内的延时单元进行校准,且实时自动校准在硬件上只需提供一个不随外界温度和电压变化的TDC时钟且延时链长度增加1倍即可。
