A wideband low-phase-noise LC voltage-controlled oscillator （VCO） with low VCO gain （Kvco） vari- ation for WLAN fractional-N frequency synthesizer application is proposed and designed on a 0.13-μm CMOS process. I...A wideband low-phase-noise LC voltage-controlled oscillator （VCO） with low VCO gain （Kvco） vari- ation for WLAN fractional-N frequency synthesizer application is proposed and designed on a 0.13-μm CMOS process. In order to achieve a low Kvco variation, an extra switched varactor array was added to the LC tank with the conventional switched capacitor array. Based on the proposed switched varactor array compensation technique, the measured Kvco is 43 MHz/V with only 6.29% variation across the entire tuning range. The proposed VCO provides a tuning range of 23.7% from 3.01 to 3.82 GHz, while consuming 9 mA of quiescent current from a 2.3 V supply. The VCO shows a low phase noise of-121.94 dBc/Hz at 1 MHz offset, from the 3.6 GHz carrier.展开更多
采用SMIC 0.18μm Mixed Signal CMOS工艺设计了恒定压控增益的宽带LC压控振荡器。采用模拟式振幅负反馈的方式,通过模拟电路实现对偏置电流的负反馈控制,同时采用了通过数字控制的单刀双掷开关控制可变电容阵列的调谐,并且对固定电容...采用SMIC 0.18μm Mixed Signal CMOS工艺设计了恒定压控增益的宽带LC压控振荡器。采用模拟式振幅负反馈的方式,通过模拟电路实现对偏置电流的负反馈控制,同时采用了通过数字控制的单刀双掷开关控制可变电容阵列的调谐,并且对固定电容单元进行开关的方法,从而实现恒定的压控增益且相邻频带之间的频率间隔近似相等。后仿真结果表明,本设计的LC VCO调谐频率范围2.15~3.03 GHz,压控增益在全部频率调谐范围内为70~80 MHz/V,相位噪声在全部频率调谐范围内低于-120.0 d Bc/Hz@1 MHz。展开更多
An analysis illustrates the loop nonlinear performance in a bang-bang PLL. A third-order equivalent model is deduced to give an approximate evaluation of the loop parameters. The architecture of the proposed phase det...An analysis illustrates the loop nonlinear performance in a bang-bang PLL. A third-order equivalent model is deduced to give an approximate evaluation of the loop parameters. The architecture of the proposed phase detector is composed of four master-slave DFFs and two XORs based on the current mode logic circuit. A no-load architecture is introduced in the XOR design. The oscillator is designed with an LC VCO implementation for the jitter requirement. A simple voltage-to-current converter is proposed to drive the loop filter. The loop filter design is described in detail, which is important to ensure the nonlinear loop stability. The chip is fabricated in a 0.18 μm CMOS technology. The experimental results show that it can achieve the frequency range of 2.995 to 3.35 GHz, and a phase noise of-118.38 dBc/Hz at 1 MHz offset. The frequency to voltage gain is 270 MHz/V. The chip consumes less than 81 mW with 1.8 V supply voltage, and it occupies a 0.5 mm2 area.展开更多
This paper presents an LC voltage controlled oscillator（VCO） in a dual-band frequency synthesizer for IMT-advanced and UWB applications.The switched current source,cross-coupled pair and noise filtering technique ar...This paper presents an LC voltage controlled oscillator（VCO） in a dual-band frequency synthesizer for IMT-advanced and UWB applications.The switched current source,cross-coupled pair and noise filtering technique are adopted in this VCO design to improve the performance of the phase noise,power consumption,voltage amplitude,and tuning range.In order to achieve a wide tuning range,a reconfigurable LC tank with 4 bits switch control is adopted in the core circuit design.The size of the entire chip with pad is 1.11 0.98 mm2.The test results show that the current dissipation of the VCO at UWB and IMT-Advanced band is 3 mA and 4.5 mA in a 1.2 V supply.The tuning range of the designed VCO is 3.86-5.28 GHz and 3.14-3.88 GHz.The phase-noise at 1 MHz frequency offset from a 3.5 GHz and 4.2 GHz carrier is-123 dBc/Hz and-119 dBc/Hz,respectively.展开更多
基于TSMC 65nm CMOS工艺,设计了一种低相噪宽调谐范围的电压控制振荡器(VCO)。VCO的负电阻部分创新性地使用由NMOS和PMOS晶体管组成的电流复用拓扑结构,谐振开关结构用于实现宽调谐范围和高频振荡时保持较为稳定的压控增益(Kvco)。电路...基于TSMC 65nm CMOS工艺,设计了一种低相噪宽调谐范围的电压控制振荡器(VCO)。VCO的负电阻部分创新性地使用由NMOS和PMOS晶体管组成的电流复用拓扑结构,谐振开关结构用于实现宽调谐范围和高频振荡时保持较为稳定的压控增益(Kvco)。电路的尾电流部分采用POMS电流镜结构用于减小晶体管闪烁噪声对VCO相位噪声的影响。在1.2 V电源电压下,压控振荡器的功耗为4.5 m W,1.72 GHz频率处相位噪声达到-112 d Bc/Hz@100 k Hz。该LC VCO的宽调谐范围和良好的相位噪声性能较好地用于各种PLL电路中。展开更多
基金supported by the State Key Development Program for Basic Research of China(No.2010CB327404)the National High Technology Research and Development Program of China(No.2011AA010202)+2 种基金the National Science and Technology Major Project of China(No.2012ZX03004004)the National Natural Science Foundation of China(Nos.61176034,61101001,61204026)the Tsinghua University Initiative Scientific Research Program
文摘A wideband low-phase-noise LC voltage-controlled oscillator （VCO） with low VCO gain （Kvco） vari- ation for WLAN fractional-N frequency synthesizer application is proposed and designed on a 0.13-μm CMOS process. In order to achieve a low Kvco variation, an extra switched varactor array was added to the LC tank with the conventional switched capacitor array. Based on the proposed switched varactor array compensation technique, the measured Kvco is 43 MHz/V with only 6.29% variation across the entire tuning range. The proposed VCO provides a tuning range of 23.7% from 3.01 to 3.82 GHz, while consuming 9 mA of quiescent current from a 2.3 V supply. The VCO shows a low phase noise of-121.94 dBc/Hz at 1 MHz offset, from the 3.6 GHz carrier.
基金Project supported by the Zhejiang Provincial Natural Science Foundation of China(No.Y1110991)the National Natural Science Foundation of China(No.61102027)the Start Research Foundation of Hangzhou Dianzi University(No.KYS045609050)
文摘An analysis illustrates the loop nonlinear performance in a bang-bang PLL. A third-order equivalent model is deduced to give an approximate evaluation of the loop parameters. The architecture of the proposed phase detector is composed of four master-slave DFFs and two XORs based on the current mode logic circuit. A no-load architecture is introduced in the XOR design. The oscillator is designed with an LC VCO implementation for the jitter requirement. A simple voltage-to-current converter is proposed to drive the loop filter. The loop filter design is described in detail, which is important to ensure the nonlinear loop stability. The chip is fabricated in a 0.18 μm CMOS technology. The experimental results show that it can achieve the frequency range of 2.995 to 3.35 GHz, and a phase noise of-118.38 dBc/Hz at 1 MHz offset. The frequency to voltage gain is 270 MHz/V. The chip consumes less than 81 mW with 1.8 V supply voltage, and it occupies a 0.5 mm2 area.
基金Project supported by the National High Technology Research and Development Program of China (No.2009AA01Z261)the National Science and Technology Major Special Project(Nos.2009ZX03007-001,2012ZX03001-019)
文摘This paper presents an LC voltage controlled oscillator（VCO） in a dual-band frequency synthesizer for IMT-advanced and UWB applications.The switched current source,cross-coupled pair and noise filtering technique are adopted in this VCO design to improve the performance of the phase noise,power consumption,voltage amplitude,and tuning range.In order to achieve a wide tuning range,a reconfigurable LC tank with 4 bits switch control is adopted in the core circuit design.The size of the entire chip with pad is 1.11 0.98 mm2.The test results show that the current dissipation of the VCO at UWB and IMT-Advanced band is 3 mA and 4.5 mA in a 1.2 V supply.The tuning range of the designed VCO is 3.86-5.28 GHz and 3.14-3.88 GHz.The phase-noise at 1 MHz frequency offset from a 3.5 GHz and 4.2 GHz carrier is-123 dBc/Hz and-119 dBc/Hz,respectively.
文摘基于TSMC 65nm CMOS工艺,设计了一种低相噪宽调谐范围的电压控制振荡器(VCO)。VCO的负电阻部分创新性地使用由NMOS和PMOS晶体管组成的电流复用拓扑结构,谐振开关结构用于实现宽调谐范围和高频振荡时保持较为稳定的压控增益(Kvco)。电路的尾电流部分采用POMS电流镜结构用于减小晶体管闪烁噪声对VCO相位噪声的影响。在1.2 V电源电压下,压控振荡器的功耗为4.5 m W,1.72 GHz频率处相位噪声达到-112 d Bc/Hz@100 k Hz。该LC VCO的宽调谐范围和良好的相位噪声性能较好地用于各种PLL电路中。
