Total dose irradiation and the hot-carrier effects of sub-micro NMOSFETs are studied. The results show that the manifestations of damage caused by these two effects are quite different, though the principles of damage...Total dose irradiation and the hot-carrier effects of sub-micro NMOSFETs are studied. The results show that the manifestations of damage caused by these two effects are quite different, though the principles of damage formation are somewhat similar. For the total dose irradiation effect, the most notable damage lies in the great increase of the off-state leakage current. As to the hot-carrier effect, most changes come from the decrease of the output characteristics curves as well as the decrease of trans-conductance. It is considered that the oxide-trapped and interface-trapped charges related to STI increase the current during irradiation, while the negative charges generated in the gate oxide, as well as the interface-trapped charges at the gate interface, cause the degradation of the hot-carrier effect. Different aspects should be considered when the device is generally hardened against these two effects.展开更多
The hot-carrier effect charactenstic in a deep submicron partially depleted SOI NMOSFET is investigated. Obvious hot-carrier degradation is observed under off-state stress.The hot-carrier damage is supposed to be indu...The hot-carrier effect charactenstic in a deep submicron partially depleted SOI NMOSFET is investigated. Obvious hot-carrier degradation is observed under off-state stress.The hot-carrier damage is supposed to be induced by the parasitic bipolar effects of a float SOI device.The back channel also suffers degradation from the hot carrier in the drain depletion region as well as the front channel.At low gate voltage,there is a hump in the sub-threshold curve of the back gate transistor,and it does not shift in the same way as the main transistor under stress.While under the same condition,there is a more severe hot-carrier effect with a shorter channel transistor. The reasons for those phenomena are discussed in detail.展开更多
Annular gate nMOSFETs are frequently used in spaceborne integrated circuits due to their intrinsic good capability of resisting total ionizing dose （TID） effect. However, their capability of resisting the hot carrie...Annular gate nMOSFETs are frequently used in spaceborne integrated circuits due to their intrinsic good capability of resisting total ionizing dose （TID） effect. However, their capability of resisting the hot carrier effect （HCE） has also been proven to be very weak. In this paper, the reason why the annular gate nMOSFETs have good TID but bad HCE resistance is discussed in detail, and an improved design to locate the source contacts only along one side of the annular gate is used to weaken the HCE degradation. The good TID and HCE hardened capability of the design are verified by the experiments for I/O and core nMOSFETs in a 0.18 μm bulk CMOS technology. In addition, the shortcoming of this design is also discussed and the TID and the HCE characteristics of the replacers （the annular source nMOSFETs） are also studied to provide a possible alternative for the designers.展开更多
基于0.18μm CMOS工艺开发了抗总剂量辐射加固技术,制备的1.8 V NMOS器件常态性能良好,器件在500 krad(Si)剂量点时,阈值电压与关态漏电流无明显变化。研究器件的热载流子效应,采用体电流Isub/漏电流Id模型评估器件的HCI寿命,寿命达到5...基于0.18μm CMOS工艺开发了抗总剂量辐射加固技术,制备的1.8 V NMOS器件常态性能良好,器件在500 krad(Si)剂量点时,阈值电压与关态漏电流无明显变化。研究器件的热载流子效应,采用体电流Isub/漏电流Id模型评估器件的HCI寿命,寿命达到5.75年,满足在1.1 Vdd电压下工作寿命大于0.2年的规范要求。探索总剂量辐射效应与热载流子效应的耦合作用,对比辐照与非辐照器件的热载流子损伤,器件经辐照并退火后,受到的热载流子影响变弱。评估加固工艺对器件HCI可靠性的影响,结果表明场区总剂量加固工艺并不会造成热载流子损伤加剧的问题。展开更多
文摘Total dose irradiation and the hot-carrier effects of sub-micro NMOSFETs are studied. The results show that the manifestations of damage caused by these two effects are quite different, though the principles of damage formation are somewhat similar. For the total dose irradiation effect, the most notable damage lies in the great increase of the off-state leakage current. As to the hot-carrier effect, most changes come from the decrease of the output characteristics curves as well as the decrease of trans-conductance. It is considered that the oxide-trapped and interface-trapped charges related to STI increase the current during irradiation, while the negative charges generated in the gate oxide, as well as the interface-trapped charges at the gate interface, cause the degradation of the hot-carrier effect. Different aspects should be considered when the device is generally hardened against these two effects.
文摘The hot-carrier effect charactenstic in a deep submicron partially depleted SOI NMOSFET is investigated. Obvious hot-carrier degradation is observed under off-state stress.The hot-carrier damage is supposed to be induced by the parasitic bipolar effects of a float SOI device.The back channel also suffers degradation from the hot carrier in the drain depletion region as well as the front channel.At low gate voltage,there is a hump in the sub-threshold curve of the back gate transistor,and it does not shift in the same way as the main transistor under stress.While under the same condition,there is a more severe hot-carrier effect with a shorter channel transistor. The reasons for those phenomena are discussed in detail.
基金supported by the Key Program of the National Natural Science Foundation of China(Grant No.60836004)the National Natural Science Foundation of China(Grant Nos.61006070 and 61076025)
文摘Annular gate nMOSFETs are frequently used in spaceborne integrated circuits due to their intrinsic good capability of resisting total ionizing dose （TID） effect. However, their capability of resisting the hot carrier effect （HCE） has also been proven to be very weak. In this paper, the reason why the annular gate nMOSFETs have good TID but bad HCE resistance is discussed in detail, and an improved design to locate the source contacts only along one side of the annular gate is used to weaken the HCE degradation. The good TID and HCE hardened capability of the design are verified by the experiments for I/O and core nMOSFETs in a 0.18 μm bulk CMOS technology. In addition, the shortcoming of this design is also discussed and the TID and the HCE characteristics of the replacers （the annular source nMOSFETs） are also studied to provide a possible alternative for the designers.
