以TMS320C542为例,介绍了其系列DSP(digital signal processing)芯片HPI(host port interface) 口的各个组成部分及其功能,并以AT89C51单片机作为主处理机,阐述了与TMS320C542之间实现数据共享的方法,成功地解决了主处理机通过 HPI接口...以TMS320C542为例,介绍了其系列DSP(digital signal processing)芯片HPI(host port interface) 口的各个组成部分及其功能,并以AT89C51单片机作为主处理机,阐述了与TMS320C542之间实现数据共享的方法,成功地解决了主处理机通过 HPI接口对DSP内部数据进行在线修改和实时监控的问题.最后给出了如何用HPI口实现程序的加载引导,以提高程序运行速度的方法.展开更多
数字信号处理芯片除了要有很强的数字处理能力外,在构成系统时还需要方便灵活的接口。德州仪器公司(TI)的很多DSP中都设计了HPI(Host Port Interface)接口,外部主机可通过该接口直接访问DSP的存储空间,包括映射的外围设备。文章介绍了用...数字信号处理芯片除了要有很强的数字处理能力外,在构成系统时还需要方便灵活的接口。德州仪器公司(TI)的很多DSP中都设计了HPI(Host Port Interface)接口,外部主机可通过该接口直接访问DSP的存储空间,包括映射的外围设备。文章介绍了用HPI接口实现主机和DSP的高速数据交互。展开更多
Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency(IF)board to form a high performance windows platform.Under this structure,the vector network anal...Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency(IF)board to form a high performance windows platform.Under this structure,the vector network analyzer needs a powerful encoding system to arbitrate the bus acquirement,which is usually realized by field-programmable gate array(FPGA)chip.The paper explores the shared bus design method of the digital signal processing(DSP)board in network analyzer.Firsty,it puts an emphasis on the system structure,and then the shared bus communication method is described in detail;Finally,the advantages of the shared bus communication mechanism are summanzed.展开更多
本文分析了在对高速数据存盘时,现有的数据采集处理系统存在的问题;进而提出了一种基于TMS320C5410的主机接口(HPI-host port interface)的主从式高速数据采集处理系统。该系统实现了对高速数据的实时采集、处理和存盘,并具有电路简单...本文分析了在对高速数据存盘时,现有的数据采集处理系统存在的问题;进而提出了一种基于TMS320C5410的主机接口(HPI-host port interface)的主从式高速数据采集处理系统。该系统实现了对高速数据的实时采集、处理和存盘,并具有电路简单、通用性强等优点。展开更多
文摘以TMS320C542为例,介绍了其系列DSP(digital signal processing)芯片HPI(host port interface) 口的各个组成部分及其功能,并以AT89C51单片机作为主处理机,阐述了与TMS320C542之间实现数据共享的方法,成功地解决了主处理机通过 HPI接口对DSP内部数据进行在线修改和实时监控的问题.最后给出了如何用HPI口实现程序的加载引导,以提高程序运行速度的方法.
文摘Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency(IF)board to form a high performance windows platform.Under this structure,the vector network analyzer needs a powerful encoding system to arbitrate the bus acquirement,which is usually realized by field-programmable gate array(FPGA)chip.The paper explores the shared bus design method of the digital signal processing(DSP)board in network analyzer.Firsty,it puts an emphasis on the system structure,and then the shared bus communication method is described in detail;Finally,the advantages of the shared bus communication mechanism are summanzed.
