Thermoelectric materials can be used to convert heat to electric power through the Seebeck effect. We study magneto-thermoelectric figure of merit （ZT） in three-dimensional Dirac semimetal Cd3A 5 2 crystal. It is fo...Thermoelectric materials can be used to convert heat to electric power through the Seebeck effect. We study magneto-thermoelectric figure of merit （ZT） in three-dimensional Dirac semimetal Cd3A 5 2 crystal. It is found that enhancement of power factor and reduction of thermal conductivity can be realized at the same time through magnetic field although magnetoresistivity is greatly increased. ZT can be highly enhanced from 0.17 to 1.1 by more than six times around 350 K under a perpendicular magnetic field of 7 T. The huge enhancement of ZT by magnetic field arises from the linear Dirac band with large Fermi velocity and the large electric thermal conductivity in CdsA 5 2. Our work paves a new way to greatly enhance the thermoelectric performance in the quantum topological materials.展开更多
指出了安全体系架构问题是安全开发和安全应用所面临的最关键问题,In te l的安全体系架构(CDSA)就是一种典型的集中式安全体系架构设计.对In te l的安全体系架构CDSA的技术原理、安全功能作了介绍,重点分析了该安全体系的优势与不足等,...指出了安全体系架构问题是安全开发和安全应用所面临的最关键问题,In te l的安全体系架构(CDSA)就是一种典型的集中式安全体系架构设计.对In te l的安全体系架构CDSA的技术原理、安全功能作了介绍,重点分析了该安全体系的优势与不足等,为开展由此安全体系开发设计出来的密码硬软件的分析解剖打下基础.展开更多
Most modern microprocessors have one or two levels of on-chip caches to make things run faster,but this is not always the case.Most of the time,these caches are made of static random access memory cells.They take up a...Most modern microprocessors have one or two levels of on-chip caches to make things run faster,but this is not always the case.Most of the time,these caches are made of static random access memory cells.They take up a lot of space on the chip and use a lot of electricity.A lot of the time,low power is more important than several aspects.This is true for phones and tablets.Cache memory design for single bit architecture consists of six transistors static random access memory cell,a circuit of write driver,and sense amplifiers(such as voltage differential sense amplifier,current differential sense amplifier,charge transfer differential sense amplifier,voltage latch sense amplifier,and current latch sense amplifier,all of which are compared on different resistance values in terms of a number of transistors,delay in sensing and consumption of power.The conclusion arises that single bit six transistor static random access memory cell voltage differential sense amplifier architecture consumes 11.34μW of power which shows that power is reduced up to 83%,77.75%reduction in the case of the current differential sense amplifier,39.62%in case of charge transfer differential sense amplifier and 50%in case of voltage latch sense amplifier when compared to existing latch sense amplifier architecture.Furthermore,power reduction techniques are applied over different blocks of cache memory architecture to optimize energy.The single-bit six transistors static random access memory cell with forced tack technique and voltage differential sense amplifier with dual sleep technique consumes 8.078μW of power,i.e.,reduce 28%more power that makes single bit six transistor static random access memory cell with forced tack technique and voltage differential sense amplifier with dual sleep technique more energy efficient.展开更多
基金supported by the National Key R&D Program of the Ministry of Science and Technology China(2017YFA0303001,2016YFA0300201 and 2017YFA0204904)the National Natural Science Foundation of China(11534010,11774325 and21603210)+4 种基金the Key Research Program of Frontier Sciences CAS(QYZDY-SSW-SLH021)Hefei Science Center CAS(2016HSCIU001)the Fundamental Research Funds for the Central UniversitiesSupercomputing Center at USTC for providing the computing resourcespartially performed on the Superconducting Magnet and PPMS-16T Facilities,High Magnetic Field Laboratory of CAS
文摘Thermoelectric materials can be used to convert heat to electric power through the Seebeck effect. We study magneto-thermoelectric figure of merit （ZT） in three-dimensional Dirac semimetal Cd3A 5 2 crystal. It is found that enhancement of power factor and reduction of thermal conductivity can be realized at the same time through magnetic field although magnetoresistivity is greatly increased. ZT can be highly enhanced from 0.17 to 1.1 by more than six times around 350 K under a perpendicular magnetic field of 7 T. The huge enhancement of ZT by magnetic field arises from the linear Dirac band with large Fermi velocity and the large electric thermal conductivity in CdsA 5 2. Our work paves a new way to greatly enhance the thermoelectric performance in the quantum topological materials.
文摘指出了安全体系架构问题是安全开发和安全应用所面临的最关键问题,In te l的安全体系架构(CDSA)就是一种典型的集中式安全体系架构设计.对In te l的安全体系架构CDSA的技术原理、安全功能作了介绍,重点分析了该安全体系的优势与不足等,为开展由此安全体系开发设计出来的密码硬软件的分析解剖打下基础.
基金Research General Direction funded this research at Universidad Santiago de Cali,Grant Number 01-2021 and APC was funded by 01-2021.
文摘Most modern microprocessors have one or two levels of on-chip caches to make things run faster,but this is not always the case.Most of the time,these caches are made of static random access memory cells.They take up a lot of space on the chip and use a lot of electricity.A lot of the time,low power is more important than several aspects.This is true for phones and tablets.Cache memory design for single bit architecture consists of six transistors static random access memory cell,a circuit of write driver,and sense amplifiers(such as voltage differential sense amplifier,current differential sense amplifier,charge transfer differential sense amplifier,voltage latch sense amplifier,and current latch sense amplifier,all of which are compared on different resistance values in terms of a number of transistors,delay in sensing and consumption of power.The conclusion arises that single bit six transistor static random access memory cell voltage differential sense amplifier architecture consumes 11.34μW of power which shows that power is reduced up to 83%,77.75%reduction in the case of the current differential sense amplifier,39.62%in case of charge transfer differential sense amplifier and 50%in case of voltage latch sense amplifier when compared to existing latch sense amplifier architecture.Furthermore,power reduction techniques are applied over different blocks of cache memory architecture to optimize energy.The single-bit six transistors static random access memory cell with forced tack technique and voltage differential sense amplifier with dual sleep technique consumes 8.078μW of power,i.e.,reduce 28%more power that makes single bit six transistor static random access memory cell with forced tack technique and voltage differential sense amplifier with dual sleep technique more energy efficient.
