The chemical vapor deposition （CVD） of graphene on Cu substrates enables the fabrication of large-area monolayer graphene on desired substrates. However, during the transfer of the synthesized graphene, topographic ...The chemical vapor deposition （CVD） of graphene on Cu substrates enables the fabrication of large-area monolayer graphene on desired substrates. However, during the transfer of the synthesized graphene, topographic defects are unavoidably formed along the Cu grain boundaries, degrading the electrical properties of graphene and increasing the device-to-device variability. Here, we introduce a method of hot-pressing as a surface pre-treatment to improve the thermal stability of Cu thin film for the suppression of grain boundary grooving. The flattened Cu thin film maintains its smooth surface even after the subsequent high temperature CVD process necessary for graphene growth, and the formation of graphene without wrinkles is realized. Graphene field effect transistors （FETs） fabricated using the graphene synthesized on hot-pressed Cu thin film exhibit superior field effect mobility and significantly reduced device-to-device variation.展开更多
Field-effect transistors （FETs） have been fabricated using as-grown single-walled carbon nanotubes （SWNTs） for the channel as well as both source and drain electrodes. The underlying Si substrate was employed as t...Field-effect transistors （FETs） have been fabricated using as-grown single-walled carbon nanotubes （SWNTs） for the channel as well as both source and drain electrodes. The underlying Si substrate was employed as the back-gate electrode. Fabrication consisted of patterned catalyst deposition by surface modification followed by dip-coating and synthesis of SWNTs by alcohol chemical vapor deposition （CVD）. The electrodes and channel were grown simultaneously in one CVD process. The resulting FETs exhibited excellent performance, with an I ON/I OFF ratio of 10^6 and a maximum ON-state current （/ON） exceeding 13 uA. The large I ON is attributed to SWNT bundles connecting the SWNT channel with the SWNT electrodes. Bundling creates a large contact area, which results in a small contact resistance despite the presence of Schottky barriers at metallic-semiconducting interfaces. The approach described here demonstrates a significant step toward the realization of metal-free electronics.展开更多
Low pressure chemical vapor deposition(LPCVD) is one of the most important processes during semiconductor manufacturing.However,the spatial distribution of internal temperature and extremely few samples makes it hard ...Low pressure chemical vapor deposition(LPCVD) is one of the most important processes during semiconductor manufacturing.However,the spatial distribution of internal temperature and extremely few samples makes it hard to build a good-quality model of this batch process.Besides,due to the properties of this process,the reliability of the model must be taken into consideration when optimizing the MVs.In this work,an optimal design strategy based on the self-learning Gaussian process model(GPM) is proposed to control this kind of spatial batch process.The GPM is utilized as the internal model to predict the thicknesses of thin films on all spatial-distributed wafers using the limited data.Unlike the conventional model based design,the uncertainties of predictions provided by GPM are taken into consideration to guide the optimal design of manipulated variables so that the designing can be more prudent Besides,the GPM is also actively enhanced using as little data as possible based on the predictive uncertainties.The effectiveness of the proposed strategy is successfully demonstrated in an LPCVD process.展开更多
基金Aknowledgements The authors gratefully acknowledge financial support by the European Community through the Co-operative Research Project STREAM. The authors thank Eng. S. Procopio for performing chromium deposition.
文摘The chemical vapor deposition （CVD） of graphene on Cu substrates enables the fabrication of large-area monolayer graphene on desired substrates. However, during the transfer of the synthesized graphene, topographic defects are unavoidably formed along the Cu grain boundaries, degrading the electrical properties of graphene and increasing the device-to-device variability. Here, we introduce a method of hot-pressing as a surface pre-treatment to improve the thermal stability of Cu thin film for the suppression of grain boundary grooving. The flattened Cu thin film maintains its smooth surface even after the subsequent high temperature CVD process necessary for graphene growth, and the formation of graphene without wrinkles is realized. Graphene field effect transistors （FETs） fabricated using the graphene synthesized on hot-pressed Cu thin film exhibit superior field effect mobility and significantly reduced device-to-device variation.
文摘Field-effect transistors （FETs） have been fabricated using as-grown single-walled carbon nanotubes （SWNTs） for the channel as well as both source and drain electrodes. The underlying Si substrate was employed as the back-gate electrode. Fabrication consisted of patterned catalyst deposition by surface modification followed by dip-coating and synthesis of SWNTs by alcohol chemical vapor deposition （CVD）. The electrodes and channel were grown simultaneously in one CVD process. The resulting FETs exhibited excellent performance, with an I ON/I OFF ratio of 10^6 and a maximum ON-state current （/ON） exceeding 13 uA. The large I ON is attributed to SWNT bundles connecting the SWNT channel with the SWNT electrodes. Bundling creates a large contact area, which results in a small contact resistance despite the presence of Schottky barriers at metallic-semiconducting interfaces. The approach described here demonstrates a significant step toward the realization of metal-free electronics.
基金Supported by the National High Technology Research and Development Program of China(2014AA041803)the National Natural Science Foundation of China(61320106009)
文摘Low pressure chemical vapor deposition(LPCVD) is one of the most important processes during semiconductor manufacturing.However,the spatial distribution of internal temperature and extremely few samples makes it hard to build a good-quality model of this batch process.Besides,due to the properties of this process,the reliability of the model must be taken into consideration when optimizing the MVs.In this work,an optimal design strategy based on the self-learning Gaussian process model(GPM) is proposed to control this kind of spatial batch process.The GPM is utilized as the internal model to predict the thicknesses of thin films on all spatial-distributed wafers using the limited data.Unlike the conventional model based design,the uncertainties of predictions provided by GPM are taken into consideration to guide the optimal design of manipulated variables so that the designing can be more prudent Besides,the GPM is also actively enhanced using as little data as possible based on the predictive uncertainties.The effectiveness of the proposed strategy is successfully demonstrated in an LPCVD process.
