The influences of the main structure and physical parameters of the dual-gate GeOl MOSFET on the device performance are investigated by using a TCAD 2D device simulator. A reasonable value range of germanium （Ge） ch...The influences of the main structure and physical parameters of the dual-gate GeOl MOSFET on the device performance are investigated by using a TCAD 2D device simulator. A reasonable value range of germanium （Ge） channel thickness, doping concentration, gate oxide thickness and permittivity is determined by analyzing the on-state current, off-state current, short channel effect （SCE） and drain-induced barrier lowering （DIBL） effect of the GeOI MOSFET. When the channel thickness and its doping concentration are 10-18 nm and （5-9）×1017 cm-3, and the equivalent oxide thickness and permittivity of the gate dielectric are 0.8-1 nm and 15-30, respectively, excellent device performances of the small-scaled GeOI MOSFET can be achieved： on-state current of larger than 1475 μA/μm, off-state current of smaller than 0.1μA/μm, SCE-induced threshold-voltage drift of lower than 60 mV and DIBL-induced threshold-voltage drift of lower than 140 mV.展开更多
This paper develops the simple and accurate two-dimensional analytical models for new asymmetric double-gate fully depleted strained-Si MOSFET. The models mainly include the analytical equations of the surface potenti...This paper develops the simple and accurate two-dimensional analytical models for new asymmetric double-gate fully depleted strained-Si MOSFET. The models mainly include the analytical equations of the surface potential, surface electric field and threshold voltage, which are derived by solving two dimensional Poisson equation in strained-Si layer. The models are verified by numerical simulation. Besides offering the physical insight into device physics in the model, the new structure also provides the basic designing guidance for further immunity of short channel effect and draininduced barrier-lowering of CMOS-based devices in nanometre scale.展开更多
In this work, we use a 3-nm-thick Al0.64In0.36N back-barrier layer in In0.17Al0.83N/GaN high-electron mobility transistor （HEMT） to enhance electron confinement. Based on two-dimensional device simulations, the infl...In this work, we use a 3-nm-thick Al0.64In0.36N back-barrier layer in In0.17Al0.83N/GaN high-electron mobility transistor （HEMT） to enhance electron confinement. Based on two-dimensional device simulations, the influences of Al0.64In0.36N back-barrier on the direct-current （DC） and radio-frequency （RF） characteristics of InAlN/GaN HEMT are investigated, theoretically. It is shown that an effective conduction band discontinuity of approximately 0.5 eV is created by the 3-nm-thick Al0.64In0.36N back-barrier and no parasitic electron channel is formed. Comparing with the conventional InAlN/GaN HEMT, the electron confinement of the back-barrier HEMT is significantly improved, which allows a good immunity to short-channel effect （SCE） for gate length decreasing down to 60 nm （9-nm top barrier）. For a 70-nm gate length, the peak current gain cut-off frequency （fT） and power gain cut-off frequency （fmax） of the back-barrier HEMT are 172 GHz and 217 GHz, respectively, which are higher than those of the conventional HEMT with the same gate length.展开更多
基金Project supported by the National Natural Science Foundation of China(No.61274112)
文摘The influences of the main structure and physical parameters of the dual-gate GeOl MOSFET on the device performance are investigated by using a TCAD 2D device simulator. A reasonable value range of germanium （Ge） channel thickness, doping concentration, gate oxide thickness and permittivity is determined by analyzing the on-state current, off-state current, short channel effect （SCE） and drain-induced barrier lowering （DIBL） effect of the GeOI MOSFET. When the channel thickness and its doping concentration are 10-18 nm and （5-9）×1017 cm-3, and the equivalent oxide thickness and permittivity of the gate dielectric are 0.8-1 nm and 15-30, respectively, excellent device performances of the small-scaled GeOI MOSFET can be achieved： on-state current of larger than 1475 μA/μm, off-state current of smaller than 0.1μA/μm, SCE-induced threshold-voltage drift of lower than 60 mV and DIBL-induced threshold-voltage drift of lower than 140 mV.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.60976068and60936005)the Cultivation Fund of the Major Science and Technology Innovation,Ministry of Education,China(Grant No.708083)+1 种基金Specialized Research Fund for the Doctoral Program of Higher Education(Grant No.200807010010)the Fundamental Research Funds for the Central Universities
文摘This paper develops the simple and accurate two-dimensional analytical models for new asymmetric double-gate fully depleted strained-Si MOSFET. The models mainly include the analytical equations of the surface potential, surface electric field and threshold voltage, which are derived by solving two dimensional Poisson equation in strained-Si layer. The models are verified by numerical simulation. Besides offering the physical insight into device physics in the model, the new structure also provides the basic designing guidance for further immunity of short channel effect and draininduced barrier-lowering of CMOS-based devices in nanometre scale.
基金supported by the Natural Science Foundation of Hebei Province,China(Grant No.F2013202256)
文摘In this work, we use a 3-nm-thick Al0.64In0.36N back-barrier layer in In0.17Al0.83N/GaN high-electron mobility transistor （HEMT） to enhance electron confinement. Based on two-dimensional device simulations, the influences of Al0.64In0.36N back-barrier on the direct-current （DC） and radio-frequency （RF） characteristics of InAlN/GaN HEMT are investigated, theoretically. It is shown that an effective conduction band discontinuity of approximately 0.5 eV is created by the 3-nm-thick Al0.64In0.36N back-barrier and no parasitic electron channel is formed. Comparing with the conventional InAlN/GaN HEMT, the electron confinement of the back-barrier HEMT is significantly improved, which allows a good immunity to short-channel effect （SCE） for gate length decreasing down to 60 nm （9-nm top barrier）. For a 70-nm gate length, the peak current gain cut-off frequency （fT） and power gain cut-off frequency （fmax） of the back-barrier HEMT are 172 GHz and 217 GHz, respectively, which are higher than those of the conventional HEMT with the same gate length.
