An improved Euclidean geometry approach to design quasi-cyclic （QC） Low-density parity-check （LDPC） codes with high-rate and low error floor is presented. The constructed QC-LDPC codes with high-rate have lower er...An improved Euclidean geometry approach to design quasi-cyclic （QC） Low-density parity-check （LDPC） codes with high-rate and low error floor is presented. The constructed QC-LDPC codes with high-rate have lower error floor than the original codes. The distribution of the minimum weight codeword is analyzed, and a sufficient existence condition of the minimum weight codeword is found. Simulations show that a lot of QC-LDPC codes with lower error floor can be designed by reducing the number of the minimum weight codewords satisfying this sufficient condition.展开更多
Residue number system （RNS） has received considerable attention since decades before, because it has inherent carry-free and parallel properties in addition, sub- traction, and multiplication operations. For an odd ...Residue number system （RNS） has received considerable attention since decades before, because it has inherent carry-free and parallel properties in addition, sub- traction, and multiplication operations. For an odd moduli set, the fundamental problems in RNS, such as number comparison, sign determination, and overflow detection, can be solved based on parity checking. The paper proposes a parity checking algorithm along with related propositions and the certification based on the celebrated Chinese remainder theory （CRT） and mixed radix conversion （MRC） for the moduli set {2^n-1, 2^n＋1, 2^2n＋1}. The parity checker consists of two modular adders and a carry-look-ahead chain. The hardware implementation requires less area and path delay. Besides, the implementations of number comparison, sign determination, and overflow detection, which are based on this parity checker, are also performed in this paper. And this kind of parity checker can be used as a basic element to design ALUs and DSP module in RNS.展开更多
In this study, a class of Generalized Low-Density Parity-Check （GLDPC） codes is designed for data transmission over a Partial-Band Jamming （PBJ） environment. The GLDPC codes are constructed by replacing parity-che...In this study, a class of Generalized Low-Density Parity-Check （GLDPC） codes is designed for data transmission over a Partial-Band Jamming （PBJ） environment. The GLDPC codes are constructed by replacing parity-check code constraints with those of nonsystematic Bose-Chaudhuri-Hocquenghem （BCH）, referred to as Low-Density Parity-Check （LDPC）-BCH codes. The rate of an LDPC-BCH code is adjusted by selecting the transmission length of the nonsystematic BCH code, and a low-complexity decoding algorithm based on message- passing is presented that employs A Posteriori Probability （APP） fast BCH transform for decoding the BCH check nodes at each decoding iteration. Simulation results show that the LDPC-BCH codes with a code rate of 1/8.5 have a bit error rate performance of 1 x10-8 at signal-noise-ratios of -6.97 dB, -4.63 dB, and 2.48 dB when the fractions of the band jammed are 30%, 50%, and 70%, respectively.展开更多
A new method for constructing Quasi-Cyclic (QC) Low-Density Parity-Check (LDPC) codes based on Euclidean Geometry (EG) is presented. The proposed method results in a class of QC-LDPC codes with girth of at least 6 and...A new method for constructing Quasi-Cyclic (QC) Low-Density Parity-Check (LDPC) codes based on Euclidean Geometry (EG) is presented. The proposed method results in a class of QC-LDPC codes with girth of at least 6 and the designed codes perform very close to the Shannon limit with iterative decoding. Simulations show that the designed QC-LDPC codes have almost the same performance with the existing EG-LDPC codes.展开更多
A construction method based on the p-plane to design high-girth quasi-cyclic low-density parity-check （QC-LDPC） codes is proposed. Firstly the good points in every line of the p-plane can be ascertained through filt...A construction method based on the p-plane to design high-girth quasi-cyclic low-density parity-check （QC-LDPC） codes is proposed. Firstly the good points in every line of the p-plane can be ascertained through filtering the bad points, because the designed parity-check matrixes using these points have the short cycles in Tanner graph of codes. Then one of the best points from the residual good points of every line in the p-plane will be found, respectively. The optimal point is also singled out according to the bit error rate （BER） performance of the QC-LDPC codes at last. Explicit necessary and sufficient conditions for the QC-LDPC codes to have no short cycles are presented which are in favor of removing the bad points in the p-plane. Since preventing the short cycles also prevents the small stopping sets, the proposed construction method also leads to QC-LDPC codes with a higher stopping distance.展开更多
Low-density parity-check(LDPC)codes are widely used due to their significant errorcorrection capability and linear decoding complexity.However,it is not sufficient for LDPC codes to satisfy the ultra low bit error rat...Low-density parity-check(LDPC)codes are widely used due to their significant errorcorrection capability and linear decoding complexity.However,it is not sufficient for LDPC codes to satisfy the ultra low bit error rate(BER)requirement of next-generation ultra-high-speed communications due to the error floor phenomenon.According to the residual error characteristics of LDPC codes,we consider using the high rate Reed-Solomon(RS)codes as the outer codes to construct LDPC-RS product codes to eliminate the error floor and propose the hybrid error-erasure-correction decoding algorithm for the outer code to exploit erasure-correction capability effectively.Furthermore,the overall performance of product codes is improved using iteration between outer and inner codes.Simulation results validate that BER of the product code with the proposed hybrid algorithm is lower than that of the product code with no erasure correction.Compared with other product codes using LDPC codes,the proposed LDPC-RS product code with the same code rate has much better performance and smaller rate loss attributed to the maximum distance separable(MDS)property and significant erasure-correction capability of RS codes.展开更多
An attenuated iterative reliability-based major- ity-logic （AIML） decoding algorithm for low-density parity-check （LDPC） codes is proposed, which pertains to hybrid decoding schemes. The algorithm is devised based...An attenuated iterative reliability-based major- ity-logic （AIML） decoding algorithm for low-density parity-check （LDPC） codes is proposed, which pertains to hybrid decoding schemes. The algorithm is devised based on the orthogonal check-sums of one-step majority- logic （OSMLG） decoding algorithm in conjunction with certain of reliability measures of the received symbols. Computation of reliability measure of the syndrome sum is refined by introducing an attenuation factor. Simulation results show that, in binary-input additive white Gaussian noise （BI-AWGN） channel, the AIML decoding algorithm outperforms other popular iterative reliability-based major- ity-logic （IML） decoding algorithms with a slight increase in computational complexity. Within maximum iteration number of 5, the AIML algorithm can achieve almost identical error performance to sum-product algorithm （SPA）. No error floor effect can be observed for the AIML algorithm down to the bit error rate （BER） of 10- s, while error floor appears for SPA around the BER of 10 7 even with maximum iteration number of 100. Furthermore, the inherent feature of parallel procession for AIML algorithm enforces the decoding speed in contrast to those serial decoding schemes, such as weighted bit-flipping （WBF） algorithm.展开更多
In this paper, a new kind of simple-encoding irregular systematic LDPC codes suitable for one-relay coded cooperation is designed, where the proposed joint iterative decoding is effectively performed in the destinatio...In this paper, a new kind of simple-encoding irregular systematic LDPC codes suitable for one-relay coded cooperation is designed, where the proposed joint iterative decoding is effectively performed in the destination which is in accordance with the corresponding joint Tanner graph characterizing two different component LDPC codes used by the source and relay in ideal and non-ideal relay cooperations. The theoretical analysis and simulations show that the coded cooperation scheme obviously outperforms the coded non-cooperation one under the same code rate and decoding complex. The significant performance improvement can be virtually credited to the additional mutual exchange of the extrinsic information resulted by the LDPC code employed by the source and its counterpart used by the relay in both ideal and non-ideal cooperations.展开更多
Reliability-based hybrid automatic repeat request （ARQ） （RB-HARQ） is a recently introduced approach to incremental-redundancy ARQ. In RB-HARQ scheme, the bits that are to be retransmitted are adaptively selected a...Reliability-based hybrid automatic repeat request （ARQ） （RB-HARQ） is a recently introduced approach to incremental-redundancy ARQ. In RB-HARQ scheme, the bits that are to be retransmitted are adaptively selected at the receiver based on the estimated bit reliability. It could result in significant performance gain but requires huge overhead in the feedback channel. In this study, an improved RB-HARQ scheme （IRB-HARQ） for structured low-density parity-check codes is proposed, which simplifies the comparison operations needed to search the bits to be retransmitted and outperforms the RB-HARQ scheme in consideration of the bit transmission power for the requesting messages on the feedback link. Simulation results show that the IRB-HARQ scheme is more efficient and practical than the RB-HARQ scheme.展开更多
The distribution law of the random code structure of randomly constructed irregular low-density parity-check （LDPC） codes is studied, Based on the Progressive Edge-Growth （PEG） algorithm, a new algorithm which can...The distribution law of the random code structure of randomly constructed irregular low-density parity-check （LDPC） codes is studied, Based on the Progressive Edge-Growth （PEG） algorithm, a new algorithm which can both ellminate short cycles and keep the distribution of the random code structure is presented, The experimentsl results show that the performance of the irregular LDPC codes constructed by the new algorithm is superior to that of the PEG algorithm,展开更多
If the degree distribution is chosen carefully, the irregular low-density parity-check (LDPC) codes can outperform the regular ones. An image transmission system is proposed by combining regular and irregular LDPC cod...If the degree distribution is chosen carefully, the irregular low-density parity-check (LDPC) codes can outperform the regular ones. An image transmission system is proposed by combining regular and irregular LDPC codes with 16QAM/64QAM modulation to improve both efficiency and reliability. Simulaton results show that LDPC codes are good coding schemes over fading channel in image communication with lower system complexity. More over, irregular codes can obtain a code gain of about 0.7 dB compared with regular ones when BER is 10 -4. So the irregular LDPC codes are more suitable for image transmission than the regular codes.展开更多
An adaptive modulation （AM） algorithm is proposed and the application of the adapting algorithm together with low-density parity-check （LDPC） codes in multicarrier systems is investigated. The AM algorithm is base...An adaptive modulation （AM） algorithm is proposed and the application of the adapting algorithm together with low-density parity-check （LDPC） codes in multicarrier systems is investigated. The AM algorithm is based on minimizing the average bit error rate （BER） of systems, the combination of AM algorithm and LDPC codes with different code rates （half and three-fourths） are studied. The proposed AM algorithm with that of Fischer et al is compared. Simulation results show that the performance of the proposed AM algorithm is better than that of the Fischer＇s algorithm. The results also show that application of the proposed AM algorithm together with LDPC codes can greatly improve the performance of multicarrier systems. Results also show that the performance of the proposed algorithm is degraded with an increase in code rate when code length is the same.展开更多
Low-Density Parity-Check （LDPC） codes are powerful error correcting codes adopted by recent communication standards. LDPC decoders are based on belief propagation algorithms, which make use of a Tanner graph and ver...Low-Density Parity-Check （LDPC） codes are powerful error correcting codes adopted by recent communication standards. LDPC decoders are based on belief propagation algorithms, which make use of a Tanner graph and very intensive message-passing computation, and usually require hardware-based dedicated solutions. With the exponential increase of the computational power of commodity graphics processing units （GPUs）, new opportunities have arisen to develop general purpose processing on GPUs. This paper proposes the use of GPUs for implementing flexible and programmable LDPC decoders. A new stream-based approach is proposed, based on compact data structures to represent the Tanner graph. It is shown that such a challenging application for stream-based computing, because of irregular memory access patterns, memory bandwidth and recursive flow control constraints, can be efficiently implemented on GPUs. The proposal was experimentally evaluated by programming LDPC decoders on GPUs using the Caravela platform, a generic interface tool for managing the kernels＇ execution regardless of the GPU manufacturer and operating system. Moreover, to relatively assess the obtained results, we have also implemented LDPC decoders on general purpose processors with Streaming Single Instruction Multiple Data （SIMD） Extensions. Experimental results show that the solution proposed here efficiently decodes several codewords simultaneously, reducing the processing time by one order of magnitude.展开更多
基金supported by the Scientific Research Program Funded by Shaanxi Provincial Education Department (11JK1007)the Program for Young Teachers in Xi’an University of Posts and Telecommunications (0001286)the National Basic Research Program of China (2012CB328300)
文摘An improved Euclidean geometry approach to design quasi-cyclic （QC） Low-density parity-check （LDPC） codes with high-rate and low error floor is presented. The constructed QC-LDPC codes with high-rate have lower error floor than the original codes. The distribution of the minimum weight codeword is analyzed, and a sufficient existence condition of the minimum weight codeword is found. Simulations show that a lot of QC-LDPC codes with lower error floor can be designed by reducing the number of the minimum weight codewords satisfying this sufficient condition.
基金the National Natural Science Foundation of China (Grant No.60496313)
文摘Residue number system （RNS） has received considerable attention since decades before, because it has inherent carry-free and parallel properties in addition, sub- traction, and multiplication operations. For an odd moduli set, the fundamental problems in RNS, such as number comparison, sign determination, and overflow detection, can be solved based on parity checking. The paper proposes a parity checking algorithm along with related propositions and the certification based on the celebrated Chinese remainder theory （CRT） and mixed radix conversion （MRC） for the moduli set {2^n-1, 2^n＋1, 2^2n＋1}. The parity checker consists of two modular adders and a carry-look-ahead chain. The hardware implementation requires less area and path delay. Besides, the implementations of number comparison, sign determination, and overflow detection, which are based on this parity checker, are also performed in this paper. And this kind of parity checker can be used as a basic element to design ALUs and DSP module in RNS.
基金supported by the National Natural Science Foundation of China (Nos. 61101072 and 61132002)
文摘In this study, a class of Generalized Low-Density Parity-Check （GLDPC） codes is designed for data transmission over a Partial-Band Jamming （PBJ） environment. The GLDPC codes are constructed by replacing parity-check code constraints with those of nonsystematic Bose-Chaudhuri-Hocquenghem （BCH）, referred to as Low-Density Parity-Check （LDPC）-BCH codes. The rate of an LDPC-BCH code is adjusted by selecting the transmission length of the nonsystematic BCH code, and a low-complexity decoding algorithm based on message- passing is presented that employs A Posteriori Probability （APP） fast BCH transform for decoding the BCH check nodes at each decoding iteration. Simulation results show that the LDPC-BCH codes with a code rate of 1/8.5 have a bit error rate performance of 1 x10-8 at signal-noise-ratios of -6.97 dB, -4.63 dB, and 2.48 dB when the fractions of the band jammed are 30%, 50%, and 70%, respectively.
基金Supported by the National Key Basic Research Program (973) Project (No. 2010CB328300)the 111 Project (No. B08038)
文摘A new method for constructing Quasi-Cyclic (QC) Low-Density Parity-Check (LDPC) codes based on Euclidean Geometry (EG) is presented. The proposed method results in a class of QC-LDPC codes with girth of at least 6 and the designed codes perform very close to the Shannon limit with iterative decoding. Simulations show that the designed QC-LDPC codes have almost the same performance with the existing EG-LDPC codes.
基金supported by the National Natural Science Foundation of China (60572093)Specialized Research Fund for the Doctoral Program of Higher Education (20050004016)
文摘A construction method based on the p-plane to design high-girth quasi-cyclic low-density parity-check （QC-LDPC） codes is proposed. Firstly the good points in every line of the p-plane can be ascertained through filtering the bad points, because the designed parity-check matrixes using these points have the short cycles in Tanner graph of codes. Then one of the best points from the residual good points of every line in the p-plane will be found, respectively. The optimal point is also singled out according to the bit error rate （BER） performance of the QC-LDPC codes at last. Explicit necessary and sufficient conditions for the QC-LDPC codes to have no short cycles are presented which are in favor of removing the bad points in the p-plane. Since preventing the short cycles also prevents the small stopping sets, the proposed construction method also leads to QC-LDPC codes with a higher stopping distance.
基金This work was supported in part by National Natural Science Foundation of China(No.61671324)the Director’s Funding from Pilot National Laboratory for Marine Science and Technology(Qingdao)(QNLM201712).
文摘Low-density parity-check(LDPC)codes are widely used due to their significant errorcorrection capability and linear decoding complexity.However,it is not sufficient for LDPC codes to satisfy the ultra low bit error rate(BER)requirement of next-generation ultra-high-speed communications due to the error floor phenomenon.According to the residual error characteristics of LDPC codes,we consider using the high rate Reed-Solomon(RS)codes as the outer codes to construct LDPC-RS product codes to eliminate the error floor and propose the hybrid error-erasure-correction decoding algorithm for the outer code to exploit erasure-correction capability effectively.Furthermore,the overall performance of product codes is improved using iteration between outer and inner codes.Simulation results validate that BER of the product code with the proposed hybrid algorithm is lower than that of the product code with no erasure correction.Compared with other product codes using LDPC codes,the proposed LDPC-RS product code with the same code rate has much better performance and smaller rate loss attributed to the maximum distance separable(MDS)property and significant erasure-correction capability of RS codes.
文摘An attenuated iterative reliability-based major- ity-logic （AIML） decoding algorithm for low-density parity-check （LDPC） codes is proposed, which pertains to hybrid decoding schemes. The algorithm is devised based on the orthogonal check-sums of one-step majority- logic （OSMLG） decoding algorithm in conjunction with certain of reliability measures of the received symbols. Computation of reliability measure of the syndrome sum is refined by introducing an attenuation factor. Simulation results show that, in binary-input additive white Gaussian noise （BI-AWGN） channel, the AIML decoding algorithm outperforms other popular iterative reliability-based major- ity-logic （IML） decoding algorithms with a slight increase in computational complexity. Within maximum iteration number of 5, the AIML algorithm can achieve almost identical error performance to sum-product algorithm （SPA）. No error floor effect can be observed for the AIML algorithm down to the bit error rate （BER） of 10- s, while error floor appears for SPA around the BER of 10 7 even with maximum iteration number of 100. Furthermore, the inherent feature of parallel procession for AIML algorithm enforces the decoding speed in contrast to those serial decoding schemes, such as weighted bit-flipping （WBF） algorithm.
基金Supported by the Open Research Fund of National Moblie Communications Research Laboratory of Southeast Uni-versity (No. W200704)
文摘In this paper, a new kind of simple-encoding irregular systematic LDPC codes suitable for one-relay coded cooperation is designed, where the proposed joint iterative decoding is effectively performed in the destination which is in accordance with the corresponding joint Tanner graph characterizing two different component LDPC codes used by the source and relay in ideal and non-ideal relay cooperations. The theoretical analysis and simulations show that the coded cooperation scheme obviously outperforms the coded non-cooperation one under the same code rate and decoding complex. The significant performance improvement can be virtually credited to the additional mutual exchange of the extrinsic information resulted by the LDPC code employed by the source and its counterpart used by the relay in both ideal and non-ideal cooperations.
文摘Reliability-based hybrid automatic repeat request （ARQ） （RB-HARQ） is a recently introduced approach to incremental-redundancy ARQ. In RB-HARQ scheme, the bits that are to be retransmitted are adaptively selected at the receiver based on the estimated bit reliability. It could result in significant performance gain but requires huge overhead in the feedback channel. In this study, an improved RB-HARQ scheme （IRB-HARQ） for structured low-density parity-check codes is proposed, which simplifies the comparison operations needed to search the bits to be retransmitted and outperforms the RB-HARQ scheme in consideration of the bit transmission power for the requesting messages on the feedback link. Simulation results show that the IRB-HARQ scheme is more efficient and practical than the RB-HARQ scheme.
基金Supported by the National Natural Science Foundation of China (Grant No. 60172030)Huawei Science FoundationXidian ISN National Key Laboratory
文摘The distribution law of the random code structure of randomly constructed irregular low-density parity-check （LDPC） codes is studied, Based on the Progressive Edge-Growth （PEG） algorithm, a new algorithm which can both ellminate short cycles and keep the distribution of the random code structure is presented, The experimentsl results show that the performance of the irregular LDPC codes constructed by the new algorithm is superior to that of the PEG algorithm,
文摘If the degree distribution is chosen carefully, the irregular low-density parity-check (LDPC) codes can outperform the regular ones. An image transmission system is proposed by combining regular and irregular LDPC codes with 16QAM/64QAM modulation to improve both efficiency and reliability. Simulaton results show that LDPC codes are good coding schemes over fading channel in image communication with lower system complexity. More over, irregular codes can obtain a code gain of about 0.7 dB compared with regular ones when BER is 10 -4. So the irregular LDPC codes are more suitable for image transmission than the regular codes.
基金the National Natural Science Foundation of China (60496313)
文摘An adaptive modulation （AM） algorithm is proposed and the application of the adapting algorithm together with low-density parity-check （LDPC） codes in multicarrier systems is investigated. The AM algorithm is based on minimizing the average bit error rate （BER） of systems, the combination of AM algorithm and LDPC codes with different code rates （half and three-fourths） are studied. The proposed AM algorithm with that of Fischer et al is compared. Simulation results show that the performance of the proposed AM algorithm is better than that of the Fischer＇s algorithm. The results also show that application of the proposed AM algorithm together with LDPC codes can greatly improve the performance of multicarrier systems. Results also show that the performance of the proposed algorithm is degraded with an increase in code rate when code length is the same.
基金Supported by the Portuguese Foundation for Science and Technology,through the FEDER program,and also under Grant No.SFRH/BD/37495/2007
文摘Low-Density Parity-Check （LDPC） codes are powerful error correcting codes adopted by recent communication standards. LDPC decoders are based on belief propagation algorithms, which make use of a Tanner graph and very intensive message-passing computation, and usually require hardware-based dedicated solutions. With the exponential increase of the computational power of commodity graphics processing units （GPUs）, new opportunities have arisen to develop general purpose processing on GPUs. This paper proposes the use of GPUs for implementing flexible and programmable LDPC decoders. A new stream-based approach is proposed, based on compact data structures to represent the Tanner graph. It is shown that such a challenging application for stream-based computing, because of irregular memory access patterns, memory bandwidth and recursive flow control constraints, can be efficiently implemented on GPUs. The proposal was experimentally evaluated by programming LDPC decoders on GPUs using the Caravela platform, a generic interface tool for managing the kernels＇ execution regardless of the GPU manufacturer and operating system. Moreover, to relatively assess the obtained results, we have also implemented LDPC decoders on general purpose processors with Streaming Single Instruction Multiple Data （SIMD） Extensions. Experimental results show that the solution proposed here efficiently decodes several codewords simultaneously, reducing the processing time by one order of magnitude.
