Leakage current of CMOS circuit increases dramatically with the technologyscaling down and has become a critical issue of high performance system. Subthreshold, gate andreverse biased junction band-to-band tunneling (...Leakage current of CMOS circuit increases dramatically with the technologyscaling down and has become a critical issue of high performance system. Subthreshold, gate andreverse biased junction band-to-band tunneling (BTBT) leakages are considered three maindeterminants of total leakage current. Up to now, how to accurately estimate leakage current oflarge-scale circuits within endurable time remains unsolved, even though accurate leakage modelshave been widely discussed. In this paper, the authors first dip into the stack effect of CMOStechnology and propose a new simple gate-level leakage current model. Then, a table-lookup basedtotal leakage current simulator is built up according to the model. To validate the simulator,accurate leakage current is simulated at circuit level using popular simulator HSPICE forcomparison. Some further studies such as maximum leakage current estimation, minimum leakage currentgeneration and a high-level average leakage current macromodel are introduced in detail.Experiments on ISCAS85 and ISCAS89 benchmarks demonstrate that the two proposed leakage currentestimation methods are very accurate and efficient.展开更多
Ordinary algebra is used to represent Boolean algebra on logic variables with states 0 and 1, so to achieve a unify approach to simulated both digital and analog circuit in PSPICE. Result on mixed A/D simulation shows...Ordinary algebra is used to represent Boolean algebra on logic variables with states 0 and 1, so to achieve a unify approach to simulated both digital and analog circuit in PSPICE. Result on mixed A/D simulation shows a save in memory but generally longer run time.展开更多
文摘Leakage current of CMOS circuit increases dramatically with the technologyscaling down and has become a critical issue of high performance system. Subthreshold, gate andreverse biased junction band-to-band tunneling (BTBT) leakages are considered three maindeterminants of total leakage current. Up to now, how to accurately estimate leakage current oflarge-scale circuits within endurable time remains unsolved, even though accurate leakage modelshave been widely discussed. In this paper, the authors first dip into the stack effect of CMOStechnology and propose a new simple gate-level leakage current model. Then, a table-lookup basedtotal leakage current simulator is built up according to the model. To validate the simulator,accurate leakage current is simulated at circuit level using popular simulator HSPICE forcomparison. Some further studies such as maximum leakage current estimation, minimum leakage currentgeneration and a high-level average leakage current macromodel are introduced in detail.Experiments on ISCAS85 and ISCAS89 benchmarks demonstrate that the two proposed leakage currentestimation methods are very accurate and efficient.
文摘Ordinary algebra is used to represent Boolean algebra on logic variables with states 0 and 1, so to achieve a unify approach to simulated both digital and analog circuit in PSPICE. Result on mixed A/D simulation shows a save in memory but generally longer run time.
