We present a generic approximate graphical method for determining the equilibrium Fermi level and majority carrier density of a semiconductor with multiple donors and multiple acceptors compensating each other. Simple...We present a generic approximate graphical method for determining the equilibrium Fermi level and majority carrier density of a semiconductor with multiple donors and multiple acceptors compensating each other. Simple and easy-to-follow procedures of the graphical method are described.By graphically plotting two wrapping step functions facing each other,one for the positive hole-ionized donor and one for the negative electron-ionized acceptor,we have the crossing point that renders the Fermi level and majority carrier density.Using the graphical method,new equations are derived,such as the carrier compensation proportional to N;/N;,not the widely quoted N;-N;.Visual insight is offered to view not only the result of graphic determination of Fermi level and majority carrier density but also the dominant and critical pair of donors and acceptors in compensation.The graphical method presented in this work will help to guide the design,adjustment,and improvement of the multiply doped semiconductors.Comparison of this approximate graphical method with previous work on compensation,and with some experimental results,is made.Future work in the field is proposed.展开更多
In recent years, graphical processing unit （GPU）-accelerated intelligent algorithms have been widely utilized for solving combination optimization problems, which are NP-hard, These intelligent algorithms involves a...In recent years, graphical processing unit （GPU）-accelerated intelligent algorithms have been widely utilized for solving combination optimization problems, which are NP-hard, These intelligent algorithms involves a common operation, namely reduction, in which the best suitable candidate solution in the neighborhood is selected. As one of the main procedures, it is necessary to optimize the reduction on the GPU. In this paper, we propose an enhanced warp-based reduction on the GPU. Compared with existing block-based reduction methods, our method exploit efficiently the potential of implementation at warp level, which better matches the characteristics of current GPU architecture. Firstly, in order to improve the global memory access performance, the vectoring accessing is utilized. Secondly, at the level of thread block reduction, an enhanced warp-based reduction on the shared memory are presented to form partial results. Thirdly, for the configuration of the number of thread blocks, the number of thread blocks can be obtained by maximizing the size of thread block and the maximum size of threads per stream multi-processor on GPU. Finally, the proposed method is evaluated on three generations of NVIDIA GPUs with the better performances than previous methods.展开更多
文摘We present a generic approximate graphical method for determining the equilibrium Fermi level and majority carrier density of a semiconductor with multiple donors and multiple acceptors compensating each other. Simple and easy-to-follow procedures of the graphical method are described.By graphically plotting two wrapping step functions facing each other,one for the positive hole-ionized donor and one for the negative electron-ionized acceptor,we have the crossing point that renders the Fermi level and majority carrier density.Using the graphical method,new equations are derived,such as the carrier compensation proportional to N;/N;,not the widely quoted N;-N;.Visual insight is offered to view not only the result of graphic determination of Fermi level and majority carrier density but also the dominant and critical pair of donors and acceptors in compensation.The graphical method presented in this work will help to guide the design,adjustment,and improvement of the multiply doped semiconductors.Comparison of this approximate graphical method with previous work on compensation,and with some experimental results,is made.Future work in the field is proposed.
基金Supported by National Nature Science Foundation of China(61472289)the Nature Science Foundation of Hubei Province(2015CFB254)
文摘In recent years, graphical processing unit （GPU）-accelerated intelligent algorithms have been widely utilized for solving combination optimization problems, which are NP-hard, These intelligent algorithms involves a common operation, namely reduction, in which the best suitable candidate solution in the neighborhood is selected. As one of the main procedures, it is necessary to optimize the reduction on the GPU. In this paper, we propose an enhanced warp-based reduction on the GPU. Compared with existing block-based reduction methods, our method exploit efficiently the potential of implementation at warp level, which better matches the characteristics of current GPU architecture. Firstly, in order to improve the global memory access performance, the vectoring accessing is utilized. Secondly, at the level of thread block reduction, an enhanced warp-based reduction on the shared memory are presented to form partial results. Thirdly, for the configuration of the number of thread blocks, the number of thread blocks can be obtained by maximizing the size of thread block and the maximum size of threads per stream multi-processor on GPU. Finally, the proposed method is evaluated on three generations of NVIDIA GPUs with the better performances than previous methods.
