The problems existing in the binary logic system and the advantages of multiple-valued logic (MVL) are introduced. A literal circuit with three-track-output structure is created based on resonant tunneling diodes (RTD...The problems existing in the binary logic system and the advantages of multiple-valued logic (MVL) are introduced. A literal circuit with three-track-output structure is created based on resonant tunneling diodes (RTDs) and it has the most basic memory function. A ternary RTD D flip-flop with pre-set and pre-reset functions is also designed, the key module of which is the RTD literal circuit. Two types of output structure of the ternary RTD D flip-flop are optional: one is three-track and the other is single-track; these two structures can be transformed conveniently by merely adding tri-valued RTD NAND, NOR, and inverter units after the three-track output. The design is verified by simulation. Ternary flip-flop consists of an RTD literal circuit and it not only is easy to understand and implement but also provides a solution for the algebraic interface between the multiple-valued logic and the binary logic. The method can also be used for design of other types of multiple-valued RTD flip-flop circuits.展开更多
Quantum-dot cellular automata (QCA) technology has been widely considered as an alternative to complementary metal-oxide-semiconductor (CMOS) due to QCA's inherent merits.Many interesting QCA-based logic circuits ...Quantum-dot cellular automata (QCA) technology has been widely considered as an alternative to complementary metal-oxide-semiconductor (CMOS) due to QCA's inherent merits.Many interesting QCA-based logic circuits with smaller feature size,higher operating frequency,and lower power consumption than CMOS have been presented.However,QCA is limited in its sequential circuit design with high performance flip-flops.Based on a brief introduction of QCA and dual-edge triggered (DET) flip-flop,we propose two original QCA-based D and JK DET flip-flops,offering the same data throughput of corresponding single-edge triggered (SET) flip-flops at half the clock pulse frequency.The logic functionality of the two proposed flip-flops is verified with the QCADesigner tool.All the proposed QCA-based DET flip-flops show higher performance than their SET counterparts in terms of data throughput.Furthermore,compared with a previous DET D flip-flop,the number of cells,covered area,and time delay of the proposed DET D flip-flop are reduced by 20.5%,23.5%,and 25%,respectively.By using a lower clock pulse frequency,the proposed DET flip-flops are promising for constructing QCA sequential circuits and systems with high performance.展开更多
文摘The problems existing in the binary logic system and the advantages of multiple-valued logic (MVL) are introduced. A literal circuit with three-track-output structure is created based on resonant tunneling diodes (RTDs) and it has the most basic memory function. A ternary RTD D flip-flop with pre-set and pre-reset functions is also designed, the key module of which is the RTD literal circuit. Two types of output structure of the ternary RTD D flip-flop are optional: one is three-track and the other is single-track; these two structures can be transformed conveniently by merely adding tri-valued RTD NAND, NOR, and inverter units after the three-track output. The design is verified by simulation. Ternary flip-flop consists of an RTD literal circuit and it not only is easy to understand and implement but also provides a solution for the algebraic interface between the multiple-valued logic and the binary logic. The method can also be used for design of other types of multiple-valued RTD flip-flop circuits.
基金Project (No.Y1110808) supported by the Natural Science Foundation of Zhejiang Province,China
文摘Quantum-dot cellular automata (QCA) technology has been widely considered as an alternative to complementary metal-oxide-semiconductor (CMOS) due to QCA's inherent merits.Many interesting QCA-based logic circuits with smaller feature size,higher operating frequency,and lower power consumption than CMOS have been presented.However,QCA is limited in its sequential circuit design with high performance flip-flops.Based on a brief introduction of QCA and dual-edge triggered (DET) flip-flop,we propose two original QCA-based D and JK DET flip-flops,offering the same data throughput of corresponding single-edge triggered (SET) flip-flops at half the clock pulse frequency.The logic functionality of the two proposed flip-flops is verified with the QCADesigner tool.All the proposed QCA-based DET flip-flops show higher performance than their SET counterparts in terms of data throughput.Furthermore,compared with a previous DET D flip-flop,the number of cells,covered area,and time delay of the proposed DET D flip-flop are reduced by 20.5%,23.5%,and 25%,respectively.By using a lower clock pulse frequency,the proposed DET flip-flops are promising for constructing QCA sequential circuits and systems with high performance.
