In this paper, the He’s parameter-expanding method (HPEM) and the 4q-Boubaker Polynomials Expansion Scheme (BPES) are used in order to obtain analytical solutions to the non-linear modified Van der Pol’s oscillating...In this paper, the He’s parameter-expanding method (HPEM) and the 4q-Boubaker Polynomials Expansion Scheme (BPES) are used in order to obtain analytical solutions to the non-linear modified Van der Pol’s oscillating circuit equation. The resolution protocols are applied to the ordinary Van der Pol equation, which annexed to conjoint delayed feedback and delay-related damping terms. The results are plotted, and compared with exact solutions proposed elsewhere, in order to evaluate accuracy.展开更多
Traditional feedforward structures suffer from performance constraints caused by the complex adder before quantizer.This paper presents an improved 4th-order 1 -bit sigma-delta modulator which has a simple adder and d...Traditional feedforward structures suffer from performance constraints caused by the complex adder before quantizer.This paper presents an improved 4th-order 1 -bit sigma-delta modulator which has a simple adder and delayed input feedforward to relax timing constraints and implement low-distortion.The modulator was fabricated in a 0.35μm CMOS process,and it achieved 92.8 dB SNDR and 101 dB DR with a signal bandwidth of 100 kHz dissipating 8.6 mW power from a 3.3-V supply.The performance satisfies the requirements of a GSM system.展开更多
文摘In this paper, the He’s parameter-expanding method (HPEM) and the 4q-Boubaker Polynomials Expansion Scheme (BPES) are used in order to obtain analytical solutions to the non-linear modified Van der Pol’s oscillating circuit equation. The resolution protocols are applied to the ordinary Van der Pol equation, which annexed to conjoint delayed feedback and delay-related damping terms. The results are plotted, and compared with exact solutions proposed elsewhere, in order to evaluate accuracy.
基金Project supported by the National Science Fund for Distinguished Young Scholars of China(No.60925015)
文摘Traditional feedforward structures suffer from performance constraints caused by the complex adder before quantizer.This paper presents an improved 4th-order 1 -bit sigma-delta modulator which has a simple adder and delayed input feedforward to relax timing constraints and implement low-distortion.The modulator was fabricated in a 0.35μm CMOS process,and it achieved 92.8 dB SNDR and 101 dB DR with a signal bandwidth of 100 kHz dissipating 8.6 mW power from a 3.3-V supply.The performance satisfies the requirements of a GSM system.
