This paper proposes a new concept of synthesized voltage vector to address dead-time effect issue for Finite Control Set Model Predictive Control(FCS-MPC)technique.For a voltage source inverter(VSI),dead-time is inevi...This paper proposes a new concept of synthesized voltage vector to address dead-time effect issue for Finite Control Set Model Predictive Control(FCS-MPC)technique.For a voltage source inverter(VSI),dead-time is inevitably inserted between the turn off and turn on instants of power devices to avoid short circuit phenomenon.The influence of dead-time leads to output voltage vector error of three-phase inverters.Furthermore,it will result in computing deviation in cost function,and will deteriorate the performance of the system if not properly dealt with.In this paper,the problem is clearly analyzed,and the solution to this issue is proposed by introducing a synthesized voltage vector.The proposed solution is verified by Hardware-in-the-loop(HiL)test in real time,and results validate the effectiveness of the proposed solution.展开更多
Dead time is necessary for the coupled power switches to prevent shoot-through,especially in the modular multilevel converters(MMCs)with a large number of power switches.This paper proposes a dead-time effect suppress...Dead time is necessary for the coupled power switches to prevent shoot-through,especially in the modular multilevel converters(MMCs)with a large number of power switches.This paper proposes a dead-time effect suppression strategy for MMCs with nearest level modulation.The operational principles of MMCs are first analyzed.According to the operational features of MMCs,the method that removes a switching signal from the coupled switches and the reduced switching frequency voltage balancing algorithms(RSFVBAs)are mixed in the proposed method.In the intervals that are furthest away from the zerocrossing points(ZCP)of arm currents,the single switching signal method can completely eliminate the dead-time effect(DTE).Alternatively,the DTE is suppressed by the RSFVBA in intervals that are close to the ZCP.By the combination of the two methods,the dependence of the DTE suppression method on currents is reduced and the influences of ZCP are also released without degrading the normal operation performance of MMCs.Moreover,the output performance of MMCs is improved and the voltage stress on the arm inductor dramatically decreases.Finally,the validation of the method is verified by the simulation results with the professional tool Matlab/Simulink.展开更多
This paper presents a novel driving circuit for the high-side switch of high voltage buck regulators.A 40 V P-channel lateral double-diffused metal–oxide–semiconductor device whose drain–source and drain–gate can ...This paper presents a novel driving circuit for the high-side switch of high voltage buck regulators.A 40 V P-channel lateral double-diffused metal–oxide–semiconductor device whose drain–source and drain–gate can resist high voltage, but whose source–gate must be less than 5 V, is used as the high-side switch. The proposed driving circuit provides a stable and accurate 5 V driving voltage for protecting the high-side switch from breakdown and achieving low on-resistance and simple loop stability design. Furthermore, the driving circuit with excellent driving capability decreases the switching loss and dead time is also developed to reduce the shoot-through current loss. Therefore, power efficiency is greatly improved. An asynchronous buck regulator with the proposed technique has been successfully fabricated by a 0.35 μm CDMOS technology. From the results, compared with the accuracy of16.38% of the driving voltage in conventional design, a high accuracy of 1.38% is achieved in this work. Moreover,power efficiency is up to 95% at 12 V input and 5 V output.展开更多
文摘This paper proposes a new concept of synthesized voltage vector to address dead-time effect issue for Finite Control Set Model Predictive Control(FCS-MPC)technique.For a voltage source inverter(VSI),dead-time is inevitably inserted between the turn off and turn on instants of power devices to avoid short circuit phenomenon.The influence of dead-time leads to output voltage vector error of three-phase inverters.Furthermore,it will result in computing deviation in cost function,and will deteriorate the performance of the system if not properly dealt with.In this paper,the problem is clearly analyzed,and the solution to this issue is proposed by introducing a synthesized voltage vector.The proposed solution is verified by Hardware-in-the-loop(HiL)test in real time,and results validate the effectiveness of the proposed solution.
基金supported by the State Key Laboratory of Advanced Power Transmission Technology(GEIRI-SKL-2020-011)。
文摘Dead time is necessary for the coupled power switches to prevent shoot-through,especially in the modular multilevel converters(MMCs)with a large number of power switches.This paper proposes a dead-time effect suppression strategy for MMCs with nearest level modulation.The operational principles of MMCs are first analyzed.According to the operational features of MMCs,the method that removes a switching signal from the coupled switches and the reduced switching frequency voltage balancing algorithms(RSFVBAs)are mixed in the proposed method.In the intervals that are furthest away from the zerocrossing points(ZCP)of arm currents,the single switching signal method can completely eliminate the dead-time effect(DTE).Alternatively,the DTE is suppressed by the RSFVBA in intervals that are close to the ZCP.By the combination of the two methods,the dependence of the DTE suppression method on currents is reduced and the influences of ZCP are also released without degrading the normal operation performance of MMCs.Moreover,the output performance of MMCs is improved and the voltage stress on the arm inductor dramatically decreases.Finally,the validation of the method is verified by the simulation results with the professional tool Matlab/Simulink.
基金supported by the National Natural Science Foundation of China(No.61106026)the Fundamental Research Funds for the Central Universities of China(No.K50511020028)
文摘This paper presents a novel driving circuit for the high-side switch of high voltage buck regulators.A 40 V P-channel lateral double-diffused metal–oxide–semiconductor device whose drain–source and drain–gate can resist high voltage, but whose source–gate must be less than 5 V, is used as the high-side switch. The proposed driving circuit provides a stable and accurate 5 V driving voltage for protecting the high-side switch from breakdown and achieving low on-resistance and simple loop stability design. Furthermore, the driving circuit with excellent driving capability decreases the switching loss and dead time is also developed to reduce the shoot-through current loss. Therefore, power efficiency is greatly improved. An asynchronous buck regulator with the proposed technique has been successfully fabricated by a 0.35 μm CDMOS technology. From the results, compared with the accuracy of16.38% of the driving voltage in conventional design, a high accuracy of 1.38% is achieved in this work. Moreover,power efficiency is up to 95% at 12 V input and 5 V output.
