A novel dual-directional silicon controlled rectifier（DDSCR） device with embedded PNP structure（DDSCR-PNP） is proposed for electrostatic discharge（ESD） protection, which has greatly reduced latch-up risk owing t...A novel dual-directional silicon controlled rectifier（DDSCR） device with embedded PNP structure（DDSCR-PNP） is proposed for electrostatic discharge（ESD） protection, which has greatly reduced latch-up risk owing to the improved holding voltage（V_h/. Firstly, the working mechanism of the DDSCR-PNP is analyzed. The theoretical analysis indicates that the proposed device possesses good voltage clamp ability due to the embedded PNP（PNP_2）. Then, experimental devices are fabricated in a 0.35 m bipolar-CMOS-DMOS process and measured with a Barth 4002 transmission line pulse testing system. The results show that the V_h of DDSCR-PNP is much higher than that of the conventional DDSCR, and can be further increased by adjusting the P well width.However, the reduced leakage current（I_L/ of the DDSCR-PNP shows obvious fluctuations when the P well width is increased to more than 12 m. Finally, the factors influencing V_h and I_L are investigated by Sentaurus simulations. The results verify that the lateral PNP_2 helps to increase V_h and decrease I_L. When the P well width is further increased, the effect of the lateral PNP_2 is weakened, causing an increased I_L. The proposed DDSCR-PNP provides an effective and attractive ESD protection solution for high-voltage integrated circuits.展开更多
This paper presents a new phenomenon,where the holding-voltage of a silicon-controlled rectifier acts as an electrostatic-discharge protection drift in diverse film thicknesses in silicon-on-insulator（SOI） technolog...This paper presents a new phenomenon,where the holding-voltage of a silicon-controlled rectifier acts as an electrostatic-discharge protection drift in diverse film thicknesses in silicon-on-insulator（SOI） technology. The phenomenon was demonstrated through fabricated chips in 0.18μm SOI technology.The drift of the holding voltage was then simulated,and its mechanism is discussed comprehensively through ISE TCAD simulations.展开更多
基金supported by the Fundamental Research Funds for the Central Universities(No.JUSRP51323B)the Joint Innovation Project of Jiangsu Province(No.BY2013015-19)+2 种基金the Summit of the Six Top Talents Program of Jiangsu Province(No.DZXX-053)the Graduate Student Innovation Program for Universities of Jiangsu Province(Nos.KYLX_1119SJZZ_0148)
文摘A novel dual-directional silicon controlled rectifier（DDSCR） device with embedded PNP structure（DDSCR-PNP） is proposed for electrostatic discharge（ESD） protection, which has greatly reduced latch-up risk owing to the improved holding voltage（V_h/. Firstly, the working mechanism of the DDSCR-PNP is analyzed. The theoretical analysis indicates that the proposed device possesses good voltage clamp ability due to the embedded PNP（PNP_2）. Then, experimental devices are fabricated in a 0.35 m bipolar-CMOS-DMOS process and measured with a Barth 4002 transmission line pulse testing system. The results show that the V_h of DDSCR-PNP is much higher than that of the conventional DDSCR, and can be further increased by adjusting the P well width.However, the reduced leakage current（I_L/ of the DDSCR-PNP shows obvious fluctuations when the P well width is increased to more than 12 m. Finally, the factors influencing V_h and I_L are investigated by Sentaurus simulations. The results verify that the lateral PNP_2 helps to increase V_h and decrease I_L. When the P well width is further increased, the effect of the lateral PNP_2 is weakened, causing an increased I_L. The proposed DDSCR-PNP provides an effective and attractive ESD protection solution for high-voltage integrated circuits.
基金Project supported by the National Natural Science Foundation of China(No.60927006)
文摘This paper presents a new phenomenon,where the holding-voltage of a silicon-controlled rectifier acts as an electrostatic-discharge protection drift in diverse film thicknesses in silicon-on-insulator（SOI） technology. The phenomenon was demonstrated through fabricated chips in 0.18μm SOI technology.The drift of the holding voltage was then simulated,and its mechanism is discussed comprehensively through ISE TCAD simulations.
