Engineering construction actively occurs in coastal zones, and these areas have numerous potential geological hazard factors. Since 2009, the development of geological surveys in sea areas has promoted extensive geoph...Engineering construction actively occurs in coastal zones, and these areas have numerous potential geological hazard factors. Since 2009, the development of geological surveys in sea areas has promoted extensive geophysical surveys in Qingdao offshore. In the present study, the types and distribution of potential geological hazard factors were systematically revealed using sub-bottom profile data, side-scan sonar data, and single-channel seismic data, among others. Based on previous research findings, the potential geological hazard factors are classified, and control factors in Qingdao offshore are discussed. The research results show that the primary potential geological hazards include active faults, buried paleo channels, shallow gas, irregular bedrock, eroded gullies, estuary deltas, tidal sand ridges, and seawater intrusion. In addition, neotectonic movement, sea level changes and sedimentary dynamic processes were the main factors that affected the distribution of geological hazards in Qingdao offshore.展开更多
The buried channel (BC) nMOSFETs with gate oxide grown thermally on 4H-SiC are fabricated.The BC region and source/drain region are formed by nitrogen implantation at room temperature followed by annealing at 1600℃.T...The buried channel (BC) nMOSFETs with gate oxide grown thermally on 4H-SiC are fabricated.The BC region and source/drain region are formed by nitrogen implantation at room temperature followed by annealing at 1600℃.The channel depth is about 0.2μm.The peak field-effect mobility of 18.1cm2/(V·s) for 5μm device is achieved.Thickly dotted pits found in the surface through microscope may be one of the important factors of the cause low field-effect mobility.The threshold voltages are 1.73V and 1.72V for the gate lengths of 3μm and 5μm respectively.The transconductance at V G=20V and V D=10V is 102μS for the gate length of 3μm.展开更多
Positive bias temperature instability stress induced interface trap density in a buried InGaAs channel metaloxide-semiconductor field-effect transistor with a InCaP barrier layer and Al2O3 dielectric is investigated. ...Positive bias temperature instability stress induced interface trap density in a buried InGaAs channel metaloxide-semiconductor field-effect transistor with a InCaP barrier layer and Al2O3 dielectric is investigated. Well behaved split C-V characteristics with small capacitance frequency dispersion are confirmed after the insertion of the InCaP barrier layer. The direct-current Id-Vg measurements show both degradations of positive gate voltage shift and sub-threshold swing in the sub-threshold region, and degradation of positive △Vg in the oncurrent region. The Id-Vg degradation during the positive bias temperature instability tests is mainly contributed by the generation of near interface acceptor traps under stress. Specifically, the stress induced aeceptor traps contain both permanent and recoverable traps. Compared with surface channel InCaAs devices, stress induced recoverable donor traps are negligible in the buried channel ones.展开更多
We propose and investigate a novel metal/SiO_2/Si_3N_4/SiO_2/SiGe charge trapping flash memory structure（named as MONOS）, utilizing Si Ge as the buried channel. The fabricated memory device demonstrates excellent pr...We propose and investigate a novel metal/SiO_2/Si_3N_4/SiO_2/SiGe charge trapping flash memory structure（named as MONOS）, utilizing Si Ge as the buried channel. The fabricated memory device demonstrates excellent programerasable characteristics attributed to the fact that more carriers are generated by the smaller bandgap of Si Ge during program/erase operations. A flat-band voltage shift 2.8 V can be obtained by programming at ＋11 V for 100 us. Meanwhile, the memory device exhibits a large memory window of ~7.17 V under ±12 V sweeping voltage, and a negligible charge loss of 18% after 104 s＇ retention. In addition, the leakage current density is lower than 2.52 × 10^（-7） A·cm^（-2） below a gate breakdown voltage of 12.5 V. Investigation of leakage current-voltage indicates that the Schottky emission is the predominant conduction mechanisms for leakage current. These desirable characteristics are ascribed to the higher trap density of the Si_3N_4 charge trapping layer and the better quality of the interface between the SiO_2 tunneling layer and the Si Ge buried channel. Therefore, the application of the Si Ge buried channel is very promising to construct 3 D charge trapping NAND flash devices with improved operation characteristics.展开更多
The effects of several factors on mobility in 4H-SiC buried-channel （BC） MOSFETs are studied,A simple model that gives a quantitative analysis of series resistance effects on the effective mobility and field-effect ...The effects of several factors on mobility in 4H-SiC buried-channel （BC） MOSFETs are studied,A simple model that gives a quantitative analysis of series resistance effects on the effective mobility and field-effect mobility is proposed.A series resistance not only decreases field-effect mobility but also reduces the gate voltage corresponding to the peak field-effect mobility. The dependence of the peak field-effect mobility on series resistance follows a simple quadratic polynomial. The effects of uniform and exponential interface state distributions in the forbidden band on field-effect mobility are analyzed with an analytical model. The effects of non-uniform interface states can be ignored at lower gate voltages but become more obvious as the gate bias increases.展开更多
基金jointed funded by the National Natural Science Foundation of China (41376079 and 41276060)Marine Geology Survey Project (GZH200900501,DD20160137 and DD20190205)Foundation of the Shandong Provincial Key Laboratory of Marine Ecology and Environment&Disaster Prevention (201304).
文摘Engineering construction actively occurs in coastal zones, and these areas have numerous potential geological hazard factors. Since 2009, the development of geological surveys in sea areas has promoted extensive geophysical surveys in Qingdao offshore. In the present study, the types and distribution of potential geological hazard factors were systematically revealed using sub-bottom profile data, side-scan sonar data, and single-channel seismic data, among others. Based on previous research findings, the potential geological hazard factors are classified, and control factors in Qingdao offshore are discussed. The research results show that the primary potential geological hazards include active faults, buried paleo channels, shallow gas, irregular bedrock, eroded gullies, estuary deltas, tidal sand ridges, and seawater intrusion. In addition, neotectonic movement, sea level changes and sedimentary dynamic processes were the main factors that affected the distribution of geological hazards in Qingdao offshore.
文摘The buried channel (BC) nMOSFETs with gate oxide grown thermally on 4H-SiC are fabricated.The BC region and source/drain region are formed by nitrogen implantation at room temperature followed by annealing at 1600℃.The channel depth is about 0.2μm.The peak field-effect mobility of 18.1cm2/(V·s) for 5μm device is achieved.Thickly dotted pits found in the surface through microscope may be one of the important factors of the cause low field-effect mobility.The threshold voltages are 1.73V and 1.72V for the gate lengths of 3μm and 5μm respectively.The transconductance at V G=20V and V D=10V is 102μS for the gate length of 3μm.
基金Supported by the National Science and Technology Major Project of China under Grant No 2011ZX02708-003the National Natural Science Foundation of China under Grant No 61504165the Opening Project of Key Laboratory of Microelectronics Devices and Integrated Technology of Institute of Microelectronics of Chinese Academy of Sciences
文摘Positive bias temperature instability stress induced interface trap density in a buried InGaAs channel metaloxide-semiconductor field-effect transistor with a InCaP barrier layer and Al2O3 dielectric is investigated. Well behaved split C-V characteristics with small capacitance frequency dispersion are confirmed after the insertion of the InCaP barrier layer. The direct-current Id-Vg measurements show both degradations of positive gate voltage shift and sub-threshold swing in the sub-threshold region, and degradation of positive △Vg in the oncurrent region. The Id-Vg degradation during the positive bias temperature instability tests is mainly contributed by the generation of near interface acceptor traps under stress. Specifically, the stress induced aeceptor traps contain both permanent and recoverable traps. Compared with surface channel InCaAs devices, stress induced recoverable donor traps are negligible in the buried channel ones.
基金Supported by the National Science and Technology Major Project of China under Grant No 2013ZX02303007the National Key Research and Development Program of China under Grant No 2016YFA0301701the Youth Innovation Promotion Association of the Chinese Academy of Sciences under Grant No 2016112
文摘We propose and investigate a novel metal/SiO_2/Si_3N_4/SiO_2/SiGe charge trapping flash memory structure（named as MONOS）, utilizing Si Ge as the buried channel. The fabricated memory device demonstrates excellent programerasable characteristics attributed to the fact that more carriers are generated by the smaller bandgap of Si Ge during program/erase operations. A flat-band voltage shift 2.8 V can be obtained by programming at ＋11 V for 100 us. Meanwhile, the memory device exhibits a large memory window of ~7.17 V under ±12 V sweeping voltage, and a negligible charge loss of 18% after 104 s＇ retention. In addition, the leakage current density is lower than 2.52 × 10^（-7） A·cm^（-2） below a gate breakdown voltage of 12.5 V. Investigation of leakage current-voltage indicates that the Schottky emission is the predominant conduction mechanisms for leakage current. These desirable characteristics are ascribed to the higher trap density of the Si_3N_4 charge trapping layer and the better quality of the interface between the SiO_2 tunneling layer and the Si Ge buried channel. Therefore, the application of the Si Ge buried channel is very promising to construct 3 D charge trapping NAND flash devices with improved operation characteristics.
文摘The effects of several factors on mobility in 4H-SiC buried-channel （BC） MOSFETs are studied,A simple model that gives a quantitative analysis of series resistance effects on the effective mobility and field-effect mobility is proposed.A series resistance not only decreases field-effect mobility but also reduces the gate voltage corresponding to the peak field-effect mobility. The dependence of the peak field-effect mobility on series resistance follows a simple quadratic polynomial. The effects of uniform and exponential interface state distributions in the forbidden band on field-effect mobility are analyzed with an analytical model. The effects of non-uniform interface states can be ignored at lower gate voltages but become more obvious as the gate bias increases.
