针对现有单光子探测器模块价格昂贵和体积大的不足,设计了基于In Ga As/In P雪崩光电二极管(APD)的便携式单光子探测器,给出了探测器温控模块和偏置电压源的设计电路,门控信号的产生和雪崩信号的提取由FPGA完成。实验结果表明:在200 MH...针对现有单光子探测器模块价格昂贵和体积大的不足,设计了基于In Ga As/In P雪崩光电二极管(APD)的便携式单光子探测器,给出了探测器温控模块和偏置电压源的设计电路,门控信号的产生和雪崩信号的提取由FPGA完成。实验结果表明:在200 MHz门控条件且制冷温度为-55℃时,探测器的最大光子探测效率(PDE)约为16%,当探测效率为12%时,暗计数率(DCR)约为8.2×10-6/ns。展开更多
Avalanche photon diode and avalanche diode array, working in Geiger mode, have single photon detection capability. The structure of guard ring is the key factor to avoid the premature edge breakdown of the avalanche d...Avalanche photon diode and avalanche diode array, working in Geiger mode, have single photon detection capability. The structure of guard ring is the key factor to avoid the premature edge breakdown of the avalanche diode and increase the maximum bias voltage. A new structure of the guard ring is proposed in this letter, in which the floating guard ring is put outside the p-well guard ring. Simulation results indicate that the maximum bias voltage of the proposed guard ring is higher than that of the state-of-the-art methods.展开更多
This paper proposes two optimal designs of single photon avalanche diodes(SPADs) minimizing dark count rate(DCR). The first structure is introduced as p^+/pwell/nwell, in which a specific shallow pwell layer is added ...This paper proposes two optimal designs of single photon avalanche diodes(SPADs) minimizing dark count rate(DCR). The first structure is introduced as p^+/pwell/nwell, in which a specific shallow pwell layer is added between p^+and nwell layers to decrease the electric field below a certain threshold. The simulation results show on average 19.7%and 8.5% reduction of p^+/nwell structure’s DCR comparing with similar previous structures in different operational excess bias and temperatures respectively. Moreover, a new structure is introduced as n+/nwell/pwell, in which a specific shallow nwell layer is added between n+and pwell layers to lower the electric field below a certain threshold. The simulation results show on average 29.2% and 5.5% decrement of p^+/nwell structure’s DCR comparing with similar previous structures in different operational excess bias and temperatures respectively. It is shown that in higher excess biases(about 6 volts), the n+/nwell/pwell structure is proper to be integrated as digital silicon photomultiplier(dSiPM) due to low DCR. On the other hand, the p^+/pwell/nwell structure is appropriate to be utilized in dSiPM in high temperatures(above 50?C) due to lower DCR value.展开更多
We present a novel gated operation active quenching circuit （AQC）. In order to simulate the quenching circuit a complete SPICE model of a InGaAs SPAD is set up according to the I-V characteristic measurement resuits...We present a novel gated operation active quenching circuit （AQC）. In order to simulate the quenching circuit a complete SPICE model of a InGaAs SPAD is set up according to the I-V characteristic measurement resuits of the detector. The circuit integrated with a ROIC （readout integrated circuit） is fabricated in an CSMC 0.5 μm CMOS process and then hybrid packed with the detector. Chip measurement results show that the functionality of the circuit is correct and the performance is suitable for practical system applications.展开更多
文摘针对现有单光子探测器模块价格昂贵和体积大的不足,设计了基于In Ga As/In P雪崩光电二极管(APD)的便携式单光子探测器,给出了探测器温控模块和偏置电压源的设计电路,门控信号的产生和雪崩信号的提取由FPGA完成。实验结果表明:在200 MHz门控条件且制冷温度为-55℃时,探测器的最大光子探测效率(PDE)约为16%,当探测效率为12%时,暗计数率(DCR)约为8.2×10-6/ns。
文摘Avalanche photon diode and avalanche diode array, working in Geiger mode, have single photon detection capability. The structure of guard ring is the key factor to avoid the premature edge breakdown of the avalanche diode and increase the maximum bias voltage. A new structure of the guard ring is proposed in this letter, in which the floating guard ring is put outside the p-well guard ring. Simulation results indicate that the maximum bias voltage of the proposed guard ring is higher than that of the state-of-the-art methods.
文摘This paper proposes two optimal designs of single photon avalanche diodes(SPADs) minimizing dark count rate(DCR). The first structure is introduced as p^+/pwell/nwell, in which a specific shallow pwell layer is added between p^+and nwell layers to decrease the electric field below a certain threshold. The simulation results show on average 19.7%and 8.5% reduction of p^+/nwell structure’s DCR comparing with similar previous structures in different operational excess bias and temperatures respectively. Moreover, a new structure is introduced as n+/nwell/pwell, in which a specific shallow nwell layer is added between n+and pwell layers to lower the electric field below a certain threshold. The simulation results show on average 29.2% and 5.5% decrement of p^+/nwell structure’s DCR comparing with similar previous structures in different operational excess bias and temperatures respectively. It is shown that in higher excess biases(about 6 volts), the n+/nwell/pwell structure is proper to be integrated as digital silicon photomultiplier(dSiPM) due to low DCR. On the other hand, the p^+/pwell/nwell structure is appropriate to be utilized in dSiPM in high temperatures(above 50?C) due to lower DCR value.
基金supported by the Jiangsu Provincial Natural Science Fund(No.BK2012559)
文摘We present a novel gated operation active quenching circuit （AQC）. In order to simulate the quenching circuit a complete SPICE model of a InGaAs SPAD is set up according to the I-V characteristic measurement resuits of the detector. The circuit integrated with a ROIC （readout integrated circuit） is fabricated in an CSMC 0.5 μm CMOS process and then hybrid packed with the detector. Chip measurement results show that the functionality of the circuit is correct and the performance is suitable for practical system applications.
