A fully standard CMOS integrated strained Si-channel NMOSFET has been demonstrated. By adjusting the thickness of graded SiGe, modifying the channel doping concentration, changing the Ge fraction of the relaxed SiGe l...A fully standard CMOS integrated strained Si-channel NMOSFET has been demonstrated. By adjusting the thickness of graded SiGe, modifying the channel doping concentration, changing the Ge fraction of the relaxed SiGe layer and forming a p-well by multiple implantation technology, a surface strained Si-channel NMOSFET was fabricated, of which the low field mobility was enhanced by 140%, compared with the bulk-Si control device. Strained NMOSFET and PMOSFET were used to fabricate a strained CMOS inverter based on a SiGe virtual substrate. Test results indicated that the strained CMOS converter had a drain leakage current much lower than the Si devices, and the device exhibited wonderful on/off-state voltage transmission characteristics.展开更多
In order to fabricate strained-Si MOSFETs,we present a method to prepare strained-Si material with highquality surface and ultra-thin SiGe virtual substrate.By sandwiching a low-temperature Si（LT-Si） layer between a...In order to fabricate strained-Si MOSFETs,we present a method to prepare strained-Si material with highquality surface and ultra-thin SiGe virtual substrate.By sandwiching a low-temperature Si（LT-Si） layer between a Si buffer and a pseudomorphic Si_（0.8）Ge_（0.2） layer,the surface roughness root mean square（RMS） is 1.02 nm and the defect density is 10~6 cm^（-2） owing to the misfit dislocations restricted to the LT-Si layer and the threading dislocations suppressed from penetrating into the Si_（0.8）Ge_（0.2） layer.By employing P~＋ implantation and rapid thermal annealing, the strain relaxation degree of the Si_（0.8）Ge_（0.2） layer increases from 85.09%to 96.41%and relaxation is more uniform. Meanwhile,the RMS（1.1nm） varies a little and the defect density varies little.According to the results,the method of combining an LT-Si layer with ion implantation can prepare high-quality strained-Si material with a high relaxation degree and ultra-thin SiGe virtual substrate to meet the requirements of device applications.展开更多
This paper describes a method using both reduced pressure chemical vapor deposition （RPCVD） and ultrahigh vacuum chemical vapor deposition （UHVCVD） to grow a thin compressively strained Ge film. As the first step,...This paper describes a method using both reduced pressure chemical vapor deposition （RPCVD） and ultrahigh vacuum chemical vapor deposition （UHVCVD） to grow a thin compressively strained Ge film. As the first step, low temperature RPCVD was used to grow a fully relaxed SiGe virtual substrate layer at 500 ℃ with a thickness of 135 nm, surface roughness of 0.3 nm, and Ge content of 77%. Then, low temperature UHVCVD was used to grow a high quality strained pure Ge film on the SiGe virtual substrate at 300 ℃ with a thickness of 9 nm, surface roughness of 0.4 nm, and threading dislocation density of - 10^5 cm^-2. Finally, a very thin strained Si layer of 1.5-2 nm thickness was grown on the Ge layer at 550 ℃ for the purpose of passivation and protection. The whole epitaxial layer thickness is less than 150 nm. Due to the low growth temperature, the two-dimensional layer-by-layer growth mode dominates during the epitaxial process, which is a key factor for the growth of high quality strained Ge films.展开更多
High quality strain-relaxed thin SiGe virtual substrates have been achieved by combining the misfit strain technique and the point defect technique. The point defects were first injected into the coherently strained S...High quality strain-relaxed thin SiGe virtual substrates have been achieved by combining the misfit strain technique and the point defect technique. The point defects were first injected into the coherently strained SiGe layer through the ＂inserted Si layer＂ by argon ion implantation. After thermal annealing, an in- termediate SiGe layer was grown with a strained Si cap layer. The inserted Si layer in the SiGe film serves as the source of the misfit strain and prevents the threading dislocations from propagating into the next epitaxial layer. A strained-SilSiGelinserted-SilSiGe heterostructure was achieved with a threading dislocation density of 1×10^4 cm-2 and a root mean square surface roughness of 0.87 nm. This combined method can effectively fabricate device-quality SiGe virtual substrates with a low threading dislocation density and a smooth surface.展开更多
基金supposed by the National Basic Research Program of Chinasupposed by the State Key Laboratory of Electronic Thin Films and Integrated Devices,UESTCthe Science and Technology on Analog Integrated Circuit Laboratory,CETC
文摘A fully standard CMOS integrated strained Si-channel NMOSFET has been demonstrated. By adjusting the thickness of graded SiGe, modifying the channel doping concentration, changing the Ge fraction of the relaxed SiGe layer and forming a p-well by multiple implantation technology, a surface strained Si-channel NMOSFET was fabricated, of which the low field mobility was enhanced by 140%, compared with the bulk-Si control device. Strained NMOSFET and PMOSFET were used to fabricate a strained CMOS inverter based on a SiGe virtual substrate. Test results indicated that the strained CMOS converter had a drain leakage current much lower than the Si devices, and the device exhibited wonderful on/off-state voltage transmission characteristics.
基金Project supported by the Funds of the State Key Laboratory of Electronic Thin Films and Integrated Devices,China(No.D0200 401030108KD0022).
文摘In order to fabricate strained-Si MOSFETs,we present a method to prepare strained-Si material with highquality surface and ultra-thin SiGe virtual substrate.By sandwiching a low-temperature Si（LT-Si） layer between a Si buffer and a pseudomorphic Si_（0.8）Ge_（0.2） layer,the surface roughness root mean square（RMS） is 1.02 nm and the defect density is 10~6 cm^（-2） owing to the misfit dislocations restricted to the LT-Si layer and the threading dislocations suppressed from penetrating into the Si_（0.8）Ge_（0.2） layer.By employing P~＋ implantation and rapid thermal annealing, the strain relaxation degree of the Si_（0.8）Ge_（0.2） layer increases from 85.09%to 96.41%and relaxation is more uniform. Meanwhile,the RMS（1.1nm） varies a little and the defect density varies little.According to the results,the method of combining an LT-Si layer with ion implantation can prepare high-quality strained-Si material with a high relaxation degree and ultra-thin SiGe virtual substrate to meet the requirements of device applications.
基金Project supported by the National Natural Science Foundation of China(Nos.60636010,60820106001)
文摘This paper describes a method using both reduced pressure chemical vapor deposition （RPCVD） and ultrahigh vacuum chemical vapor deposition （UHVCVD） to grow a thin compressively strained Ge film. As the first step, low temperature RPCVD was used to grow a fully relaxed SiGe virtual substrate layer at 500 ℃ with a thickness of 135 nm, surface roughness of 0.3 nm, and Ge content of 77%. Then, low temperature UHVCVD was used to grow a high quality strained pure Ge film on the SiGe virtual substrate at 300 ℃ with a thickness of 9 nm, surface roughness of 0.4 nm, and threading dislocation density of - 10^5 cm^-2. Finally, a very thin strained Si layer of 1.5-2 nm thickness was grown on the Ge layer at 550 ℃ for the purpose of passivation and protection. The whole epitaxial layer thickness is less than 150 nm. Due to the low growth temperature, the two-dimensional layer-by-layer growth mode dominates during the epitaxial process, which is a key factor for the growth of high quality strained Ge films.
基金Supported by the National Natural Science Foundation of China(Nos. 60476017 and 60636010)the Basic Research Foundation of Tsinghua National Laboratory for Information Science andTechnology (TNList)
文摘High quality strain-relaxed thin SiGe virtual substrates have been achieved by combining the misfit strain technique and the point defect technique. The point defects were first injected into the coherently strained SiGe layer through the ＂inserted Si layer＂ by argon ion implantation. After thermal annealing, an in- termediate SiGe layer was grown with a strained Si cap layer. The inserted Si layer in the SiGe film serves as the source of the misfit strain and prevents the threading dislocations from propagating into the next epitaxial layer. A strained-SilSiGelinserted-SilSiGe heterostructure was achieved with a threading dislocation density of 1×10^4 cm-2 and a root mean square surface roughness of 0.87 nm. This combined method can effectively fabricate device-quality SiGe virtual substrates with a low threading dislocation density and a smooth surface.
