In order to overcome the bit-to-bit interference of the traditional multi-level NAND type device, this paper firstly proposes a novel multi-bit non-uniform channel charge trapping memory （NUC-CTM） device with virtua...In order to overcome the bit-to-bit interference of the traditional multi-level NAND type device, this paper firstly proposes a novel multi-bit non-uniform channel charge trapping memory （NUC-CTM） device with virtual-source NAND-type array architecture, which can effectively restrain the second-bit effect （SBE） and provide 3-bit per cell capability. Owing to the n- buffer region, the SBE induced threshold voltage window shift can be reduced to less than 400 mV and the minimum threshold voltage window between neighboring levels is larger than 750 mV for reliable 3-bit operation. A silicon-rich SiON is also investigated as a trapping layer to improve the retention reliability of the NUC-CTM.展开更多
提出了一种LS-RAID(Logic-level Striping Redundant Array of Independent Disks)固态盘(Solid State Disk,SSD)设计模型。在单个闪存芯片内,该模型在逻辑层实现了条带化,并将校验信息按照RAID5机制分配到逻辑闪存芯片中,从而提高了固...提出了一种LS-RAID(Logic-level Striping Redundant Array of Independent Disks)固态盘(Solid State Disk,SSD)设计模型。在单个闪存芯片内,该模型在逻辑层实现了条带化,并将校验信息按照RAID5机制分配到逻辑闪存芯片中,从而提高了固态盘可靠性。使用DiskSim进行仿真测试,表明该模型在提高可靠性的同时,对固态盘平均寿命和损耗均衡影响不大,具有实用价值。展开更多
基金Project supported by the National Basic Research Program of China(No.2006CB302700)
文摘In order to overcome the bit-to-bit interference of the traditional multi-level NAND type device, this paper firstly proposes a novel multi-bit non-uniform channel charge trapping memory （NUC-CTM） device with virtual-source NAND-type array architecture, which can effectively restrain the second-bit effect （SBE） and provide 3-bit per cell capability. Owing to the n- buffer region, the SBE induced threshold voltage window shift can be reduced to less than 400 mV and the minimum threshold voltage window between neighboring levels is larger than 750 mV for reliable 3-bit operation. A silicon-rich SiON is also investigated as a trapping layer to improve the retention reliability of the NUC-CTM.
文摘提出了一种LS-RAID(Logic-level Striping Redundant Array of Independent Disks)固态盘(Solid State Disk,SSD)设计模型。在单个闪存芯片内,该模型在逻辑层实现了条带化,并将校验信息按照RAID5机制分配到逻辑闪存芯片中,从而提高了固态盘可靠性。使用DiskSim进行仿真测试,表明该模型在提高可靠性的同时,对固态盘平均寿命和损耗均衡影响不大,具有实用价值。
