A high-order curvature-compensated CMOS bandgap reference（BGR） topology with a low temperature coefficient（TC） over a wide temperature range and a high power supply reject ratio（PSRR） is presented.High-order cor...A high-order curvature-compensated CMOS bandgap reference（BGR） topology with a low temperature coefficient（TC） over a wide temperature range and a high power supply reject ratio（PSRR） is presented.High-order correction is realized by incorporating a nonlinear current INL, which is generated by ？V_（GS） across resistor into current generated by a conventional first-order current-mode BGR circuit. In order to achieve a high PSRR over a broad frequency range, a voltage pre-regulating technique is applied. The circuit was implemented in CSMC 0.5 μm 600 V BCD process. The experimental results indicate that the proposed topology achieves TC of0.19 ppm/°C over the temperature range of 165 °C（-40 to 125 °C）, PSRR of-123 d B @ DC and-56 d B @ 100 k Hz. In addition, it achieves a line regulation performance of 0.017%/V in the supply range of 2.8–20 V.展开更多
基于0.18μm CMOS工艺设计了一种低噪声、高电源电压抑制比(PSRR)的新型带隙基准源(BGR)。使用低噪声的垂直双极结型晶体管取代MOS晶体管作为运算放大器输入,削减了低频闪烁噪声;通过引入三输入的运算放大器将电源扰动传递到电流管的栅...基于0.18μm CMOS工艺设计了一种低噪声、高电源电压抑制比(PSRR)的新型带隙基准源(BGR)。使用低噪声的垂直双极结型晶体管取代MOS晶体管作为运算放大器输入,削减了低频闪烁噪声;通过引入三输入的运算放大器将电源扰动传递到电流管的栅极,极大程度地降低了电源纹波对输出基准电压的干扰;并通过RC低通滤波器进一步改善噪声和PSRR性能;利用修调电路修调工艺偏差,实现了良好的温度特性。实测结果表明,该BGR的PSRR在57.7 Hz下为-108 d B,与仿真结果基本一致(-102.3 d B@50 Hz);输出电压噪声在10 Hz时为42.20 n V/√Hz,通过新提出的测试方法在0.1~1 k Hz测得总噪声电压有效值低于0.503 5μV;在-40~125℃,基准电压温度系数可以修调至20×10^(-6)/℃以下,最小值仅14.09×10^(-6)/℃;BGR面积为254.1μm×370.0μm,功耗约为8.6μA@3 V。展开更多
根据电子镇流器控制器对基准电源的设计要求,利用不同电流密度下两晶体管基极-发射极电压差的正温度特性,通过镜像电流源方式产生PTAT(proportional to absolute temperature)电流,再结合基极-发射极电压本身的负温度特性产生的电流,形...根据电子镇流器控制器对基准电源的设计要求,利用不同电流密度下两晶体管基极-发射极电压差的正温度特性,通过镜像电流源方式产生PTAT(proportional to absolute temperature)电流,再结合基极-发射极电压本身的负温度特性产生的电流,形成带隙基准电流源。仿真结果表明,该基准源的性能指标能满足系统设计的要求。展开更多
基金supported by the National Natural Science Foundation of China(Nos.BK20150627,61674030)the Natural Science Foundation of Jiangsu Province(No.61504025)the National Key research and Development Plan(No.2017YFB0402900)
文摘A high-order curvature-compensated CMOS bandgap reference（BGR） topology with a low temperature coefficient（TC） over a wide temperature range and a high power supply reject ratio（PSRR） is presented.High-order correction is realized by incorporating a nonlinear current INL, which is generated by ？V_（GS） across resistor into current generated by a conventional first-order current-mode BGR circuit. In order to achieve a high PSRR over a broad frequency range, a voltage pre-regulating technique is applied. The circuit was implemented in CSMC 0.5 μm 600 V BCD process. The experimental results indicate that the proposed topology achieves TC of0.19 ppm/°C over the temperature range of 165 °C（-40 to 125 °C）, PSRR of-123 d B @ DC and-56 d B @ 100 k Hz. In addition, it achieves a line regulation performance of 0.017%/V in the supply range of 2.8–20 V.
文摘基于0.18μm CMOS工艺设计了一种低噪声、高电源电压抑制比(PSRR)的新型带隙基准源(BGR)。使用低噪声的垂直双极结型晶体管取代MOS晶体管作为运算放大器输入,削减了低频闪烁噪声;通过引入三输入的运算放大器将电源扰动传递到电流管的栅极,极大程度地降低了电源纹波对输出基准电压的干扰;并通过RC低通滤波器进一步改善噪声和PSRR性能;利用修调电路修调工艺偏差,实现了良好的温度特性。实测结果表明,该BGR的PSRR在57.7 Hz下为-108 d B,与仿真结果基本一致(-102.3 d B@50 Hz);输出电压噪声在10 Hz时为42.20 n V/√Hz,通过新提出的测试方法在0.1~1 k Hz测得总噪声电压有效值低于0.503 5μV;在-40~125℃,基准电压温度系数可以修调至20×10^(-6)/℃以下,最小值仅14.09×10^(-6)/℃;BGR面积为254.1μm×370.0μm,功耗约为8.6μA@3 V。
文摘根据电子镇流器控制器对基准电源的设计要求,利用不同电流密度下两晶体管基极-发射极电压差的正温度特性,通过镜像电流源方式产生PTAT(proportional to absolute temperature)电流,再结合基极-发射极电压本身的负温度特性产生的电流,形成带隙基准电流源。仿真结果表明,该基准源的性能指标能满足系统设计的要求。
