An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considera...An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considerations,an analog front-end is presented with novel architecture, high power conversion efficiency, low voltage, low power consumption, and high performance in an environment of noise and power fluctuation. The circuit is implemented in a Chartered 0.35μm standard CMOS process. The experimental results show that the chip can satisfy the design target well.展开更多
Distributed power flow controller,which is among the most powerful distributed flexible transmission equipments,is still only in the stage of the oretical research and digital simulation.In order to promote the engine...Distributed power flow controller,which is among the most powerful distributed flexible transmission equipments,is still only in the stage of the oretical research and digital simulation.In order to promote the engineering demonstration of a distributed power flow controller,it is urgent to establish a digital/analog simulation platform that supports closed-loop real-time simulation of a distributed power flow controller.In this paper,the electromagnetic transient model of a distributed power flow controller is established on ADPSS(advanced digital power system simulator).The rapid control prototype realized by dSPACE is connected to ADPSS to form a digital/analog simulation platform for a distributed power flow controller.Through a voltage control and power flow control simulation of the test system with a distributed power flow controller,the correctness and effectiveness of the constructed simulation platform are verified,which provides a new way for the verification of the new theory of a distributed power flow controller.展开更多
In this paper,massive state-of-theart planar power dividers are presented and discussed. The innovations of these superiorly-performanced power dividers lie in the performance breakthrough,physical configurations and ...In this paper,massive state-of-theart planar power dividers are presented and discussed. The innovations of these superiorly-performanced power dividers lie in the performance breakthrough,physical configurations and function integrations. Eventually,based on the trend presented,the future of the power dividers is predicted. This paper might have inspiration significance to illuminate the way for the development of power dividers.展开更多
This paper introduces a high-performance analog front end for a passive UHF RFID transponder IC, which is compatible with the ISO/IEC 18000-6B standard,operating at the 915MHz ISM band with a total supply current cons...This paper introduces a high-performance analog front end for a passive UHF RFID transponder IC, which is compatible with the ISO/IEC 18000-6B standard,operating at the 915MHz ISM band with a total supply current consumption less than 8μA. There are no external components, except for the antenna. The passive IC＇s power supply is taken from the energy of the received RF electromagnetic field with the help of a Schottky diode rectifier. The RFID analog front end includes a local oscillator, clock generator, power on reset circuit, matching network and backscatter,rectifier,regulator, and AM demodulator. The IC, whose reading distance is more than 3m,is fabricated with a Chartered 0.35μm two-poly four-metal CMOS process with Schottky diodes and is EEPROM supported. The core size is 300μm × 720μm.展开更多
随着移动通信信号带宽的增加,传统功率放大器数字预失真线性化技术越来越受到采样率的限制。为了使线性化效果更好,文中提出了一种数字预失真和模拟预失真相结合的混合预失真器,利用模拟预失真宽带宽的特点和数字预失真线性化能力强的优...随着移动通信信号带宽的增加,传统功率放大器数字预失真线性化技术越来越受到采样率的限制。为了使线性化效果更好,文中提出了一种数字预失真和模拟预失真相结合的混合预失真器,利用模拟预失真宽带宽的特点和数字预失真线性化能力强的优势,把模拟预失真和数字预失真融合在一起,共同补偿功放的非线性。由于受实验设备采样率的限制,文中采用了带宽为60 MHz的5 G NR信号对一个中心频率为3.5 GHz的射频功放进行实验验证。实验结果表明:提出的混合预失真器不仅优于单独的数字预失真器和模拟预失真器的非线性矫正性能,而且还能改善数字预失真因采样率限制无法改善的带外互调失真。展开更多
A novel power-on-reset(POR) circuit with simple architecture, small values of capacitances, ultralower power consumption, and self-adjustable delay time of reset pulse for passive UHF RFID tags is presented in this pa...A novel power-on-reset(POR) circuit with simple architecture, small values of capacitances, ultralower power consumption, and self-adjustable delay time of reset pulse for passive UHF RFID tags is presented in this paper. A proposed delay element was adopted for the features of small capacitances and wide power supply rise time range. An inverter was used as a two-inputs logic device to simplify the architecture of the circuit. The technology used for design and simulation is SMIC 0.18 μm RF. Simulation results show that the circuit functions well under different process corners with different power supply rise time, and is able to generate a POR signal after the power supply is briefly powered off. The static power consumption is less than 30 pA. Moreover, the circuit operates properly along with other modules of analog front-end.展开更多
A 1.8V 8b 125Msample/s pipelined A/D converter is presented.Power efficiency is optimized by size scaling down scheme using low power single stage cascode amplifier with a gain boosted structure.Global clock tree and ...A 1.8V 8b 125Msample/s pipelined A/D converter is presented.Power efficiency is optimized by size scaling down scheme using low power single stage cascode amplifier with a gain boosted structure.Global clock tree and local generators are employed to avoid loss and overlap of clock period.The ADC achieves a signal-to-noise-and-distortion ratio (SNDR) of 49.5dB(7.9ENOB) for an input of 62MHz at full speed of 125MHz,consuming only 71mW.It is implemented in 0.18μm CMOS technology with a core area of 0.45mm 2.展开更多
A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly red...A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly reduced. Based on this exasperate antenna performance,a new rectifier with high power conversion efficiency and low turn-on voltage is presented. The circuit is implemented in an SMIC 0.18μm EEPROM process. Measurement results show that with a 120kΩ load,the power conversion efficiency reaches as high as 36%. For a sinusoidal wave with magnitude of 0. 5V, the output DC voltage reaches IV,which is high enough for RFID tags. The read distance is as far as 22cm.展开更多
文摘An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considerations,an analog front-end is presented with novel architecture, high power conversion efficiency, low voltage, low power consumption, and high performance in an environment of noise and power fluctuation. The circuit is implemented in a Chartered 0.35μm standard CMOS process. The experimental results show that the chip can satisfy the design target well.
基金the National Natural Science Foundation of China(51177114)the Major Projects of Technical Innovation in Huhei(2018AAA050,2019AAA016).
文摘Distributed power flow controller,which is among the most powerful distributed flexible transmission equipments,is still only in the stage of the oretical research and digital simulation.In order to promote the engineering demonstration of a distributed power flow controller,it is urgent to establish a digital/analog simulation platform that supports closed-loop real-time simulation of a distributed power flow controller.In this paper,the electromagnetic transient model of a distributed power flow controller is established on ADPSS(advanced digital power system simulator).The rapid control prototype realized by dSPACE is connected to ADPSS to form a digital/analog simulation platform for a distributed power flow controller.Through a voltage control and power flow control simulation of the test system with a distributed power flow controller,the correctness and effectiveness of the constructed simulation platform are verified,which provides a new way for the verification of the new theory of a distributed power flow controller.
基金supported by National Basic Research Program of China(973 Program)(No.2014CB339900)National Natural Science Foundations of China(No.61422103,No.61671084,and No.61327806)
文摘In this paper,massive state-of-theart planar power dividers are presented and discussed. The innovations of these superiorly-performanced power dividers lie in the performance breakthrough,physical configurations and function integrations. Eventually,based on the trend presented,the future of the power dividers is predicted. This paper might have inspiration significance to illuminate the way for the development of power dividers.
文摘This paper introduces a high-performance analog front end for a passive UHF RFID transponder IC, which is compatible with the ISO/IEC 18000-6B standard,operating at the 915MHz ISM band with a total supply current consumption less than 8μA. There are no external components, except for the antenna. The passive IC＇s power supply is taken from the energy of the received RF electromagnetic field with the help of a Schottky diode rectifier. The RFID analog front end includes a local oscillator, clock generator, power on reset circuit, matching network and backscatter,rectifier,regulator, and AM demodulator. The IC, whose reading distance is more than 3m,is fabricated with a Chartered 0.35μm two-poly four-metal CMOS process with Schottky diodes and is EEPROM supported. The core size is 300μm × 720μm.
文摘随着移动通信信号带宽的增加,传统功率放大器数字预失真线性化技术越来越受到采样率的限制。为了使线性化效果更好,文中提出了一种数字预失真和模拟预失真相结合的混合预失真器,利用模拟预失真宽带宽的特点和数字预失真线性化能力强的优势,把模拟预失真和数字预失真融合在一起,共同补偿功放的非线性。由于受实验设备采样率的限制,文中采用了带宽为60 MHz的5 G NR信号对一个中心频率为3.5 GHz的射频功放进行实验验证。实验结果表明:提出的混合预失真器不仅优于单独的数字预失真器和模拟预失真器的非线性矫正性能,而且还能改善数字预失真因采样率限制无法改善的带外互调失真。
基金Project supported by the Key Laboratory of Agricultural Informatization Standardization,Ministry of Agriculture and Rural Affairs
文摘A novel power-on-reset(POR) circuit with simple architecture, small values of capacitances, ultralower power consumption, and self-adjustable delay time of reset pulse for passive UHF RFID tags is presented in this paper. A proposed delay element was adopted for the features of small capacitances and wide power supply rise time range. An inverter was used as a two-inputs logic device to simplify the architecture of the circuit. The technology used for design and simulation is SMIC 0.18 μm RF. Simulation results show that the circuit functions well under different process corners with different power supply rise time, and is able to generate a POR signal after the power supply is briefly powered off. The static power consumption is less than 30 pA. Moreover, the circuit operates properly along with other modules of analog front-end.
文摘A 1.8V 8b 125Msample/s pipelined A/D converter is presented.Power efficiency is optimized by size scaling down scheme using low power single stage cascode amplifier with a gain boosted structure.Global clock tree and local generators are employed to avoid loss and overlap of clock period.The ADC achieves a signal-to-noise-and-distortion ratio (SNDR) of 49.5dB(7.9ENOB) for an input of 62MHz at full speed of 125MHz,consuming only 71mW.It is implemented in 0.18μm CMOS technology with a core area of 0.45mm 2.
文摘A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly reduced. Based on this exasperate antenna performance,a new rectifier with high power conversion efficiency and low turn-on voltage is presented. The circuit is implemented in an SMIC 0.18μm EEPROM process. Measurement results show that with a 120kΩ load,the power conversion efficiency reaches as high as 36%. For a sinusoidal wave with magnitude of 0. 5V, the output DC voltage reaches IV,which is high enough for RFID tags. The read distance is as far as 22cm.
